Error correction circuit and method thereof
First Claim
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1. A method for error correction, the method comprising the steps of:
- determining whether a number of decoding errors of a decoding error signal is greater than a threshold value within a predetermined period of time;
adjusting a setting value of a digital display interface while the number of decoding errors is greater than the threshold value during a decoding stage; and
correcting a decoding error of a decoding control signal of a lane according to corresponding decoding control signals residing in other lanes.
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Abstract
An error correction circuit and method applicable to a DisplayPort receiver is disclosed. While decoding errors occur at a decoding stage, the invention actively adjusts settings of a physical layer by using an ANSI10B/8B decoder and performs data recovery by using a correcting unit that improves the reliability of input data.
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Citations
24 Claims
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1. A method for error correction, the method comprising the steps of:
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determining whether a number of decoding errors of a decoding error signal is greater than a threshold value within a predetermined period of time; adjusting a setting value of a digital display interface while the number of decoding errors is greater than the threshold value during a decoding stage; and correcting a decoding error of a decoding control signal of a lane according to corresponding decoding control signals residing in other lanes. - View Dependent Claims (2, 3, 4, 5, 6, 17, 18)
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7. A method for error correction, the method comprising the steps of:
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determining whether a number of decoding errors of a decoding error signal is greater than a threshold value within a predetermined period of time; and correcting a decoding error of a decoding control signal of a lane according to corresponding decoding control signals residing in other lanes, wherein the method is applied to a digital display interface comprising a Main link with at least two lanes at a decoding stage. - View Dependent Claims (15)
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8. A method for error correction, the method comprising the steps of:
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determining whether a number of decoding errors of a decoding error signal is greater than a threshold value within a predetermined period of time; and correcting a decoding error of a decoding control signal of a lane according to a pattern of the decoding control signal itself, wherein the method is applied to a digital display interface comprising a Main link with only one lane at a decoding stage. - View Dependent Claims (9, 10, 16)
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11. A method for error correction, the method comprising the steps of:
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determining whether a number of decoding errors of a decoding error signal is greater than a threshold value within a predetermined period of time; and correcting erroneous decoded video data signal or erroneous decoding audio data signal by interpolation or low-pass filtering, wherein the method is applied to a digital display interface at a decoding stage, and wherein the digital display interface is a DisplayPort interface.
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12. An error correction circuit, comprising:
- at least one converting circuit, each comprising;
an equalizer for amplifying a differential signal and generating an amplified signal; a clock data recovery circuit for receiving the amplified signal and generating a recovered data; a serial to parallel converter for generating a parallel data according to the recovered data; a decoder of a digital display interface for generating a decoded data, a decoding control signal, a decoding error signal or selected combinations thereof according to the parallel data; a microprocessor configured to adjust the equalizer, the clock data recovery circuit or both according to the decoding error signal if a number of decoding errors of the decoding error signal is greater than a threshold value within a predetermined period of time; and a correcting unit configured to generate a correcting control signal correcting a decoding error of the decoding control signal of a lane to corresponding decoding control signals residing in other lanes. - View Dependent Claims (13, 14, 19, 20)
- at least one converting circuit, each comprising;
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21. A method for error correction, the method comprising the steps of:
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determining whether a number of decoding errors of a decoding error signal is greater than a threshold value within a predetermined period of time; adjusting a setting value of a digital display interface while the number of decoding errors is greater than the threshold value during a decoding stage; and correcting a decoding error of a decoding control signal of a lane according to a pattern of the decoding control signal itself, wherein the pattern of the decoding control signal is a periodic pattern. - View Dependent Claims (23)
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22. An error correction circuit, comprising:
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at least one converting circuit, each comprising; an equalizer for amplifying a differential signal and generating an amplified signal; a clock data recovery circuit for receiving the amplified signal and generating a recovered data; a serial to parallel converter for generating a parallel data according to the recovered data and; and a decoder of a digital display interface for generating a decoded data, a decoding control signal, a decoding error signal or selected combinations thereof according to the parallel data; and a microprocessor configured to adjust the equalizer, the clock data recovery circuit or both according to the decoding error signal if a number of decoding errors of the decoding error signal is greater than a threshold value within a predetermined period of time, a correcting unit configured to generate a correcting control signal correcting a decoding error of the decoding control signal of a lane according to a pattern of the decoding control signal itself, wherein the pattern of the decoding control signal is a periodic pattern. - View Dependent Claims (24)
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Specification