Semiconductor device structures with modulated and delta doping and related methods

• US 8,536,615 B1
• Filed: 08/02/2010
• Issued: 09/17/2013
• Est. Priority Date: 12/16/2009
• Status: Active Grant

• Current Assignee: CREE Incorporated (Wolfspeed, Inc.)
• Original Assignee: CREE Incorporated (Wolfspeed, Inc.)
• Inventors: Driscoll, Daniel Carleton, Chavan, Ashonita, Saxler, Adam William
• Primary Examiner(s): Rodela, Eduardo A
• Application Number:
  US12/848,600
• Time in Patent Office: 1,142 Days
• Field of Search: 257/79, 257/94, 257/101, 257/102, 257/103, 257/E33.01, 257/E33.012, 257/E33.048, 257/E33.049
• US Class Current: 257/101
• CPC Class Codes: H01L 21/0237 Materials
• CPC Class Codes: H01L 21/02378 Silicon carbide
• CPC Class Codes: H01L 21/02458 Nitrides
• CPC Class Codes: H01L 21/02507 Alternating layers, e.g. superlattice
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 33/06 within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• CPC Class Codes: H01L 33/08 with a plurality of light emitting regions, e.g. laterally discontinuous light emitting layer or photoluminescent region integrated within the semiconductor body H01L27/15 takes precedence
• CPC Class Codes: H01L 33/325 characterised by the doping materials

Abstract

A semiconductor device may include a doped semiconductor region wherein a dopant concentration of the semiconductor region is modulated over a plurality of intervals. Each interval may include at least one portion having a relatively low dopant concentration and at least one portion having a relatively high dopant concentration. A plurality of delta doped layers may be included in the plurality of intervals. Related methods are also discussed.

Claims

1. A semiconductor device comprising:

a doped semiconductor region wherein a dopant concentration of a first element of the doped semiconductor region is modulated over a plurality of intervals wherein each interval includes a first portion having a relatively low dopant concentration of the first element and a second portion having a relatively high dopant concentration of the first element, and wherein a plurality of delta doped layers are included in the plurality of intervals;

wherein the doped semiconductor region comprises a superlattice pattern of alternating layers having different concentrations of a second element different than the first element, wherein the modulated dopant concentration of the first element is provided through at least portions of the superlattice pattern, and wherein the plurality of delta doped layers are provided through at least portions of the superlattice pattern.

2. A semiconductor device according to claim 1 further comprising:

a semiconductor active region on the doped semiconductor region.

3. A semiconductor device according to claim 1 wherein the doped semiconductor region comprises a doped Group III nitride semiconductor region.

4. A semiconductor device according to claim 1 wherein at least some of the delta doped layers are included at transitions between first and second portions of each interval.

5. A semiconductor device according to claim 1 wherein at least some of the delta doped layers are included in the first portions of the intervals spaced apart from the second portions of the intervals and/or wherein at least some of the delta doped layers are included in the second portions of the intervals spaced apart from the first portions of the intervals.

6. A semiconductor device according to claim 1 wherein the plurality of intervals define a repeating pattern of different dopant concentrations of the first element having a first period, and wherein the plurality of delta doped layers define a repeating pattern having a second period superimposed on the repeating pattern of different dopant concentrations.

7. A semiconductor device according to claim 6 wherein the first period is an integer multiple of the second period and/or wherein the second period is an integer multiple of the first period.

8. A semiconductor device according to claim 1 wherein the first element comprises silicon, wherein the doped semiconductor region comprises a silicon doped Group III nitride semiconductor region, wherein a dopant concentration of silicon is modulated in the doped Group III nitride semiconductor region, and wherein the delta doped layers comprise silicon delta doped layers.

9. A semiconductor device according to claim 1, wherein each of the plurality of delta doped layers is delta doped with the first element, wherein the relatively high dopant concentration of the first element of a respective interval is at least 50 percent greater than the relatively low dopant concentration of the first element of the respective interval, and wherein a dopant concentration of the first element of each of the plurality of delta doped layers is at least about 1×

10¹² cm<sup>−

2</sup>.

10. A semiconductor device according to claim 1, wherein each of the plurality of delta doped layers is delta doped with the first element, wherein the first element comprises silicon, and wherein the second element comprises indium.

11. A semiconductor device according to claim 1 wherein each of the plurality of delta doped layers is delta doped with the first element.

12. A semiconductor device comprising:

a doped semiconductor region wherein a dopant concentration of the doped semiconductor region is modulated over a plurality of intervals wherein each interval includes a first portion having a relatively low dopant concentration and a second portion having a relatively high dopant concentration, wherein a plurality of delta doped layers are included in the plurality of intervals, and wherein the plurality of intervals define a repeating pattern having a first period;

wherein the doped semiconductor region comprises a superlattice, wherein the modulated dopant concentration is provided through at least portions of the superlattice, wherein the superlattice defines a second period different than the first period, and wherein the plurality of delta doped layers are provided through at least portions of the superlattice.

13. A semiconductor device according to claim 12 wherein a thickness of each of the delta doped layers is less than a thickness of the first portion of each interval having the relatively low dopant concentration, and wherein the thickness of each of the delta doped layers is less than a thickness of the second portion of each interval having the relatively high dopant concentration.

14. A semiconductor device according to claim 12 wherein the plurality of delta doped layers define a third period different than the second period.

15. A semiconductor device according to claim 12 wherein a dopant concentration of a first element of the doped semiconductor region is modulated over the plurality of intervals wherein each of the intervals includes the first portion having a relatively low dopant concentration of the first element and the second portion having a relatively high dopant concentration of the first element, wherein the plurality of delta doped layers are delta doped with the first element, and wherein the superlattice pattern comprises a superlattice pattern of alternating layers having different concentrations of a second element different than the first element.

16. A semiconductor device according to claim 15 wherein the first element comprises silicon and wherein the second element comprises indium.

17. A semiconductor device according to claim 12 wherein at least some of the delta doped layers are included in the first portions of the intervals spaced apart from the second portions of the intervals and/or wherein at least some of the delta doped layers are included in the second portions of the intervals spaced apart from the first portions of the intervals.

18. A semiconductor device according to claim 12 wherein the plurality of intervals define a repeating pattern of different dopant concentrations having a first period, wherein the plurality of delta doped layers define a repeating pattern having a second period superimposed on the repeating pattern of different dopant concentrations, and wherein the first and second periods are different.

19. A semiconductor device according to claim 18 wherein the first period is an integer multiple of the second period and/or wherein the second period is an integer multiple of the first period.

20. A semiconductor device comprising:

a doped semiconductor region wherein a dopant concentration of an element of the doped semiconductor region is modulated over a plurality of intervals, wherein each interval includes a first portion having a relatively low dopant concentration of the element and a second portion having a relatively high dopant concentration of the element, and wherein a plurality of delta doped layers are included in the plurality of intervals;

wherein the plurality of intervals define a repeating pattern of different dopant concentrations of the element having a first period, wherein the plurality of delta doped layers define a repeating pattern having a second period superimposed on the repeating pattern of different dopant concentrations, and wherein the first and second periods are different.

21. A semiconductor device according to claim 20 wherein at least some of the delta doped layers are included at transitions between first and second portions of each interval.

22. A semiconductor device according to claim 20 wherein at least some of the delta doped layers are included in the first portions of the intervals spaced apart from the second portions of the intervals and/or wherein at least some of the delta doped layers are included in the second portions of the intervals spaced apart from the first portions of the intervals.

23. A semiconductor device according to claim 20 wherein the first period is an integer multiple of the second period and/or wherein the second period is an integer multiple of the first period.

24. A semiconductor device according to claim 20 wherein the element comprises silicon, wherein the doped semiconductor region comprises a silicon doped Group III nitride semiconductor region, wherein a dopant concentration of silicon is modulated in the doped Group III nitride semiconductor region, and wherein the delta doped layers comprise silicon delta doped layers.

25. A semiconductor device according to claim 20 wherein the element is a first element, wherein the doped semiconductor region comprises a superlattice pattern of alternating layers having different concentrations of a second element different than the first element, wherein the modulated dopant concentration of the first element is provided through at least portions of the superlattice pattern, and wherein the plurality of delta doped layers are provided through at least portions of the superlattice pattern.

26. A semiconductor device according to claim 25 wherein the first element comprises silicon and wherein the second element comprises indium.

27. A semiconductor device according to claim 20 wherein each of the plurality of delta doped layers is delta doped with the element.

28. A semiconductor device comprising:

a doped semiconductor region wherein a dopant concentration of an element of the doped semiconductor region is modulated over a plurality of intervals wherein each interval includes a first portion having a relatively low dopant concentration of the element and a second portion having a relatively high dopant concentration of the element, wherein a plurality of delta doped layers are included in the plurality of intervals, and wherein each of the plurality of delta doped layers is delta doped with the element; and

wherein the element comprises a first element, wherein the doped semiconductor region comprises a superlattice pattern of alternating layers having different concentrations of a second element different than the first element, wherein the modulated dopant concentration of the first element is provided through at least portions of the superlattice pattern, and wherein the plurality of delta doped layers are provided through at least portions of the superlattice pattern.

29. A semiconductor device according to claim 28 wherein the first element comprises silicon and the second element comprises indium.