Method for enabling multi-processor synchronization
First Claim
1. A method executed by a plurality of processors for a plurality of mutexes, comprising:
- associating a sequence generator with each mutex, each sequence generator being adapted to generate a value for each of the processors from a sequence of values, starting from a first value;
associating a turn indicator with each mutex, wherein a first value of the turn indicator is initialized to the first value from the sequence of values;
when entering a section of code associated with the mutex,accessing the associated sequence generator to read a second value from the sequence of values, andwaiting until the associated turn indicator equals the said second value from the sequence of values before accessing the section of code; and
when exiting the section of code, setting the turn indicator to a third value subsequent to the second value in the sequence of values.
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Accused Products
Abstract
A method for providing at least one sequence of values to a plurality of processors is described. In the method, a sequence generator from one or more sequence generators is associated with a memory location. The sequence generator is configured to generate the at least one sequence of values. One or more read accesses of the memory location are enabled by a processor from the plurality of processors. In response to enabling the read access, the sequence generator is executed so that it returns a first value from the sequence of values to the processor. After executing the sequence generator, the sequence generator is advanced so that the next access generates a second value from the sequence of values. The second value is sequentially subsequent to the first value.
25 Citations
20 Claims
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1. A method executed by a plurality of processors for a plurality of mutexes, comprising:
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associating a sequence generator with each mutex, each sequence generator being adapted to generate a value for each of the processors from a sequence of values, starting from a first value; associating a turn indicator with each mutex, wherein a first value of the turn indicator is initialized to the first value from the sequence of values; when entering a section of code associated with the mutex, accessing the associated sequence generator to read a second value from the sequence of values, and waiting until the associated turn indicator equals the said second value from the sequence of values before accessing the section of code; and when exiting the section of code, setting the turn indicator to a third value subsequent to the second value in the sequence of values. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A computer readable, non-transitory medium having computer readable program code embodied therein for processing a plurality of mutexes for a plurality of processors, the program code, when executed, causing the processor to:
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associate a sequence generator with each mutex, each sequence generator being adapted to generate a value for each of the processors from a sequence of values, starting from a first value; associate a turn indicator with each mutex, wherein a first value of the turn indicator is initialized to the first value from the sequence of values; when entering a section of code associated with the mutex, access the associated sequence generator to read a second value from the sequence of values, and wait until the associated turn indicator equals the said second value from the sequence of values before accessing the section of code; and when exiting the section of code, set the turn indicator to a third value subsequent to the second value in the sequence of values. - View Dependent Claims (17, 18, 19, 20)
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Specification