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Context switching with automatic saving of special function registers memory-mapped to all banks

  • US 8,539,210 B2
  • Filed: 06/27/2008
  • Issued: 09/17/2013
  • Est. Priority Date: 11/30/2007
  • Status: Active Grant
First Claim
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1. A microprocessor or microcontroller device comprising:

  • a central processing unit (CPU);

    a data memory coupled with the CPU, wherein the data memory is divided into a plurality of memory banks; and

    a plurality of special function registers that are memory-mapped to the data memory, wherein a first set of special function registers from said plurality of memory-mapped special function registers is memory-mapped to all memory banks; and

    wherein upon occurrence of a context switch, the CPU is operable to automatically save the content of the first set of special function registers into a second set of special function registers from said plurality of memory-mapped special function registers and upon return from said context switch restore the content of the first set of special function registers from the second set of special function registers.

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