Linearizing field effect transistors in the OHMIC region
First Claim
1. An apparatus comprising:
- a field effect transistor having a gate, a source, and a drain;
a first explicit resistor having a first end coupled to the drain and a second end coupled to the gate;
a second explicit resistor having a first end coupled to the source and a second end coupled to the gate; and
a bidirectional current source configured to selectively turn on the field effect transistor to the linear region of operation and selectively turn the field effect transistor off, wherein the bidirectional current source is configured to isolate the parasitic capacitances of the field effect transistor from alternating current (AC) ground.
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Accused Products
Abstract
Apparatus and methods are disclosed related to using one or more field effect transistors as a resistor. One such apparatus can include a field effect transistor (FET), averaging resistors and a bidirectional current source. The averaging resistors can apply an average of a voltage at the source of the FET and a voltage at the drain of the FET to the gate of the field effect transistor. The bidirectional current source can turn the FET on and off. The FET can operate in the ohmic region when on. Such an apparatus can improve the linearity of the FET as a resistor, for example, at lower frequencies near or at direct current (DC). In some implementations, the apparatus can include one or more current sources to remove an offset introduced by the bidirectional current source at the source and/or the drain of the FET.
13 Citations
20 Claims
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1. An apparatus comprising:
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a field effect transistor having a gate, a source, and a drain; a first explicit resistor having a first end coupled to the drain and a second end coupled to the gate; a second explicit resistor having a first end coupled to the source and a second end coupled to the gate; and a bidirectional current source configured to selectively turn on the field effect transistor to the linear region of operation and selectively turn the field effect transistor off, wherein the bidirectional current source is configured to isolate the parasitic capacitances of the field effect transistor from alternating current (AC) ground. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. An apparatus comprising:
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a field effect transistor having a gate, a source, and a drain, wherein the field effect transistor is configured to operate in the linear region of operation when on; averaging resistors configured to apply an averaging voltage to the gate of the field effect transistor at frequencies less than or equal to approximately 4 MHz, wherein the averaging voltage is indicative of an average of a voltage at the source of the field effect transistor and a voltage at the drain of the field effect transistor; and a bidirectional current source configured to selectively turn on the field effect transistor to the linear region of operation and selectively turn the field effect transistor off, wherein an output impedance of the bidirectional current source is larger than an impedance of the averaging resistors. - View Dependent Claims (15)
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16. A method of using a field effect transistor, the method comprising:
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controlling activation of the field effect transistor with a bidirectional current source, the field effect transistor having a gate, a source, and a drain; operating the field effect transistor in the ohmic region when the bidirectional current source activates the field effect transistor; and applying an averaging voltage to the gate via explicit averaging resistors, wherein the averaging voltage is indicative of an average of a voltage at the drain and a voltage at the source, wherein a first resistor of the explicit averaging resistors is coupled to the drain, and wherein a second resistor of the explicit averaging resistors is coupled to the source. - View Dependent Claims (17, 18, 19, 20)
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Specification