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Dynamic memory and I/O management in a GPS receiver

  • US 8,548,109 B2
  • Filed: 11/16/2007
  • Issued: 10/01/2013
  • Est. Priority Date: 10/19/2005
  • Status: Expired due to Fees
First Claim
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1. A Global Positioning System (GPS) receiver, comprising:

  • a Radio Frequency (RF) portion; and

    a baseband portion, coupled to the RF portion;

    wherein the baseband portion comprises a memory and a memory controller, the memory configured as a plurality of buses, wherein the buses have at least two different bit widths, the memory comprising a fixed plurality of blocks wherein the blocks are dynamically allocated between an instruction memory block and a data memory block; and

    wherein the baseband portion further comprises a programmable drive controller configured to change a drive current of a data signal within the baseband portion of the GPS receiver based on a condition of the GPS receiver, wherein the drive current is selected from a group consisting of at least a first drive current and a second drive current, each of which are different and not zero.

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