Storage subsystem with multiple non-volatile memory arrays to protect against data losses

• US 8,549,236 B2
• Filed: 12/15/2006
• Issued: 10/01/2013
• Est. Priority Date: 12/15/2006
• Status: Active Grant

• Current Assignee: Western Digital Technologies Incorporated (Western Digital Corporation)
• Original Assignee: SiliconSystems, Inc. (Western Digital Corporation)
• Inventors: Diggs, Mark S., Merry, David E. Jr.
• Primary Examiner(s): BATAILLE, PIERRE MICHE
• Application Number:
  US11/611,705
• Publication Number:
  US 20080147962A1
• Time in Patent Office: 2,482 Days
• Field of Search: 711/162, 711/103, 711/112, 711/114, 711/154, 711/E12.008, 710/22
• US Class Current: 711/154
• CPC Class Codes: G06F 11/1456 Hardware arrangements for backup
• CPC Class Codes: G06F 11/1469 Backup restoration techniques
• CPC Class Codes: G06F 11/201 between storage system components
• CPC Class Codes: G06F 11/2071 using a plurality of controllers
• CPC Class Codes: G06F 11/2087 with a common controller
• CPC Class Codes: G06F 11/2089 Redundant storage control functionality
• CPC Class Codes: G06F 11/2094 Redundant storage or storage space G06F11/2056 takes precedence

Abstract

A storage subsystem contains multiple non-volatile memory arrays that are accessible to a host system when the storage subsystem is connected thereto. The storage subsystem implements commands and/or modes for enabling the host system to create and use backup copies of files, such that the host system can recover when files become corrupted or otherwise lost. In one embodiment, the storage subsystem presents the non-volatile memory arrays to the host'"'"'s operating system as distinct storage devices (e.g., ATA device 0 and 1), and implements special commands for copying data between these storage devices. The subsystem may alternatively present the memory arrays to the host operating system as a single storage device. The storage subsystem may have a standard form factor, such as a form factor commonly used for memory cards.

Claims

1. A storage subsystem comprising:

a first controller connected to, and being capable of writing data to and reading data from, a first solid-state non-volatile memory array;

a second controller connected to, and being capable of writing data to and reading data from, a second solid-state non-volatile memory array; and

a connector for connecting the storage subsystem to a host system, said connector coupled to the first and second controllers such that the first and second controllers are capable of receiving storage access commands from the host system;

wherein the first controller is capable of presenting at least a portion of the first non-volatile memory array to the host system as storage space of ATA device 0, and the second controller is capable of presenting at least a portion of the second non-volatile memory array to the host system as storage space of ATA device 1,

wherein both the first and second solid-state non-volatile memory arrays include operating system files associated with a boot up process of the host system;

wherein the storage subsystem is capable of being placed into a switch device mode in which data access commands issued by the host system to ATA device 1 are re-directed to the first non-volatile memory array, ATA device 0, and data access commands issued by the host system to ATA device 0 are re-directed to the second non-volatile memory array, ATA device 1, in response to an anticipated failure based on at least one of;

(1) a determination, based at least in part on usage or wear-level statistics of the first solid-state non-volatile memory array, that the first solid-state non-volatile memory array is close to the end of its useful life; and

(2) a command issued by the host system that is triggered at least in part by memory errors in the first solid-state non-volatile memory array reported by the first controller,

wherein the storage subsystem is configured to be placed in the switch device mode prior to an actual failure of the first solid-state non-volatile memory array,

wherein, due to the re-direction of data access commands, the storage subsystem provides the operating system files to the host system from the second solid-state non-volatile memory array when the host system attempts to read such files from the first solid-state non-volatile memory array to cause the host to boot up from the second solid-state non-volatile memory array without a prior failure of a data access command executed at the first non-volatile memory array and without a need to modify the host system'"'"'s BIOS.

2. The storage subsystem of claim 1, in combination with said host system, wherein the host system is programmed to make the determination that the first solid-state non-volatile memory array is close to the end of its useful life.

3. The storage subsystem of claim 1, wherein the storage subsystem includes a physical switch that enables an operator to place the storage subsystem into the switch device mode.

4. The storage subsystem of claim 1, wherein the storage subsystem implements a command that enables the host system to place the storage subsystem into the switch device mode.

5. The storage subsystem as in claim 1, wherein the first and second controllers are capable of executing non-vendor-specific ATA storage access commands.

6. The storage subsystem of claim 5, wherein the first and second controllers are additionally capable of executing at least one vendor-specific command for backing up data from the first non-volatile memory array to the second non-volatile memory array.

7. The storage subsystem of claim 6, wherein the first and second controllers are additionally capable of executing at least one vendor-specific command for restoring backed up data from the second non-volatile memory array to the first non-volatile memory array.

8. The storage subsystem as in claim 1, wherein the storage subsystem is capable of being placed into a mirror mode in which, when the host system issues a command to write data to the first storage device, the storage subsystem automatically writes all of said data to both the first non-volatile memory array and the second non-volatile memory array.

9. The storage subsystem as in claim 1, wherein the first controller is additionally capable of accessing the second non-volatile memory array, and the second controller is additionally capable of accessing the first non-volatile memory array.

10. The storage subsystem as in claim 1, wherein the first and second controllers and the first and second memory arrays are housed within a housing that complies with a standard form factor used for memory cards.

11. The storage subsystem as in claim 10, wherein the standard form factor is one of the following:

CompactFlash, SecureDigital, PCMCIA, MultiMediaCard, SmartMedia, Memory Stick.

12. The storage subsystem as in claim 1, wherein the connector is a USB connector.

13. The storage subsystem as in claim 1, further comprising a third controller that controls a third non-volatile memory array.

14. A storage subsystem, comprising:

first and second solid-state non-volatile memory arrays;

controller circuitry which is capable of writing data to, and reading data from, each of the first and second non-volatile memory arrays in response to commands received from a host system; and

a connector for connecting the storage subsystem to the host system, said connector coupled to the controller circuitry;

wherein the controller circuitry is capable of maintaining the second non-volatile memory array hidden from the host system while using the second non-volatile memory array to maintain a backup copy of data written by the host system to the first non-volatile memory array, such that the backup copy is maintained transparently to the host system, and

wherein the controller circuitry implements non-vendor-specific ATA storage access commands, and implements at least one vendor-specific command that enables the host system to access backup data stored in the second non-volatile memory array,

wherein the storage subsystem is capable of being placed into a switch device mode in which commands received from the host system for the first non-volatile memory array, presented to the host system as ATA device 0, are performed on the second non-volatile memory array, presented to the host system as ATA device 1, in response to an anticipated failure of the first non-volatile memory array based on at least one of;

(1) a determination, based at least in part on usage or wear-level statistics of the first non-volatile memory array, that the first non-volatile memory array is close to the end of its useful life; and

(2) a command issued by the host system that is triggered at least in part by memory errors in the first non-volatile memory array reported by the controller,

wherein the storage subsystem is configured to be placed in the switch device mode prior to an actual failure of the first solid-state non-volatile memory array,

wherein, due to the re-direction of data access commands, the storage subsystem provides the operating system files to the host system from the second solid-state non-volatile memory array when the host system attempts to read such files from the first solid-state non-volatile memory array to cause the host to boot up from the second solid-state non-volatile memory array without a prior failure of a data access command executed at the first non-volatile memory array and without a need to modify the host system'"'"'s BIOS.

15. The storage subsystem as in claim 14, wherein the controller circuitry and the first and second non-volatile memory arrays are housed within a housing that complies with a standard form factor used for memory cards.

16. The storage subsystem of claim 14, in combination with said host system, wherein the host system is programmed to make the determination that the first non-volatile memory array is close to the end of its useful life.

17. The storage subsystem as in claim 14, wherein the controller circuitry is further capable of using the backup copy maintained in the second non-volatile memory array to restore lost data lost from the first non-volatile memory array.