Stretchable and foldable electronic devices

• US 8,552,299 B2
• Filed: 03/05/2009
• Issued: 10/08/2013
• Est. Priority Date: 03/05/2008
• Status: Active Grant

• Current Assignee: Board of Trustees of The University of Illinois
• Original Assignee: Board of Trustees of The University of Illinois
• Inventors: Rogers, John A., Huang, Yonggang, Ko, Heung Cho, Stoykovich, Mark, Choi, Won Mook, Song, Jizhou, Ahn, Jong Hyun, Kim, Dae Hyeong
• Primary Examiner(s): NGUYEN, KHIEM M
• Application Number:
  US12/398,811
• Publication Number:
  US 20100002402A1
• Time in Patent Office: 1,678 Days
• Field of Search: 174/254, 438/30, 438/780, 438/790, 438/794, 257642-643, 361/749, 361/750
• US Class Current: 174/254
• CPC Class Codes: B33Y 80/00 Products made by additive manufacturing
• CPC Class Codes: H01L 21/4867 Applying pastes or inks, e.g. screen printing H01L21/486 takes precedence
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 2221/68359 used as a support during manufacture of interconnect decals or build up layers
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 23/4985 Flexible insulating substrates H01L23/49572 and H01L23/49855 take precedence
• CPC Class Codes: H01L 25/0655 the devices being arranged next to each other
• CPC Class Codes: H01L 25/50 Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 27/14601 Structural or functional details thereof
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01019 Potassium [K]
• CPC Class Codes: H01L 2924/01046 Palladium [Pd]
• CPC Class Codes: H01L 2924/01057 Lanthanum [La]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/09701 Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/12044 OLED
• CPC Class Codes: H01L 2924/13091 Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/1461 MEMS
• CPC Class Codes: H01L 2924/3025 Electromagnetic shielding
• CPC Class Codes: H05K 1/028 Bending or folding regions of flexible printed circuits H05K1/0283 takes precedence
• CPC Class Codes: H05K 1/0283 : Stretchable printed circuits
• CPC Class Codes: H05K 1/03 : Use of materials for the substrate
• CPC Class Codes: H05K 1/036 : Multilayers with layers of different types
• CPC Class Codes: H05K 1/0393 : Flexible materials H05K1/038 takes precedence; specific organic compositions are classified in H05K1/0313 and subgroups
• CPC Class Codes: H05K 1/111 : Pads for surface mounting, e.g. lay-out
• CPC Class Codes: H05K 1/118 : specially for flexible printed circuits, e.g. using folded portions
• CPC Class Codes: H05K 1/16 : incorporating printed electric components, e.g. printed resistor, capacitor, inductor
• CPC Class Codes: H05K 1/185 : Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit semiconductor chips encapsulated by interconnect and support structures H01L23/5389, H01L24/00
• CPC Class Codes: H05K 2201/0133 : Elastomeric or compliant polymer
• CPC Class Codes: H05K 2203/0271 : Mechanical force other than pressure, e.g. shearing or pulling
• CPC Class Codes: H05K 3/207 : using a prefabricated paste pattern, ink pattern or powder pattern
• CPC Class Codes: H05K 3/284 : for encapsulating mounted components H05K1/185 takes precedence
• CPC Class Codes: H05K 3/30 : Assembling printed circuits with electric components, e.g. with resistor
• CPC Class Codes: Y10T 29/49002 : Electrical device making
• CPC Class Codes: Y10T 29/4913 : Assembling to base an electrical component, e.g., capacitor, etc.
• CPC Class Codes: Y10T 29/49146 : with encapsulating, e.g., potting, etc.

Abstract

Disclosed herein are stretchable, foldable and optionally printable, processes for making devices and devices such as semiconductors, electronic circuits and components thereof that are capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Strain isolation layers provide good strain isolation to functional device layers. Multilayer devices are constructed to position a neutral mechanical surface coincident or proximate to a functional layer having a material that is susceptible to strain-induced failure. Neutral mechanical surfaces are positioned by one or more layers having a property that is spatially inhomogeneous, such as by patterning any of the layers of the multilayer device.

Claims

1. A method of making a stretchable and foldable electronic device, said method comprising:

providing a multilayer device comprising a substrate layer, a functional layer and one or more neutral mechanical surface adjusting layers,

wherein said functional layer is supported by said substrate layer,

wherein at least one of said one or more neutral mechanical surface adjusting layers is disposed above said functional layer,

wherein at least one of said one or more neutral mechanical surface adjusting layers of said multilayer device has a property that is spatially inhomogeneous relative to a location in said multilayer device,

wherein said spatially inhomogeneous property positions a spatially varying neutral mechanical surface coincident with or proximate to said functional layer, and

wherein spatial variations in said spatially inhomogeneous property causes said spatially varying neutral mechanical surface to be positioned at different distances from a to surface of the multilayer device in different spatial regions of the multilayer device, relative to said functional layer.

2. The method of claim 1, further comprising:

generating a pattern of said spatially inhomogeneous property in said one or more neutral mechanical surface adjusting layers having said spatially inhomogeneous property to provide one or more flexible and foldable regions in said multilayer device and one or more rigid regions in said multilayer device.

3. The method of claim 1, wherein the spatially inhomogeneous property is one or more of:

a spatially varying porosity of a layer;

a spatially varying extent of crosslinking of a layer;

a spatially varying Young'"'"'s modulus of a layer;

a spatially varying deposition of an add layer;

or

a spatially varying placement of recess features.

4. The method of claim 1, further comprising laterally patterning any layer of said multilayer device.

5. The method of claim 4, wherein said laterally patterning comprises patterning said substrate layer with one or more neutral mechanical surface adjusting layers comprising thin films or add layers.

6. The method of claim 4, wherein said laterally patterning comprises patterning said substrate layer with one or more neutral mechanical surface adjusting layers comprising one or more encapsulating layers.

7. The method of claim 4, wherein said laterally patterning comprises patterning said substrate layer with one or more recess features.

8. The method of claim 7, wherein said one or more recess features are etch holes.

9. The method of claim 4, wherein each layer of said multilayer device has a thickness, and wherein said laterally patterning comprises selectively varying the thickness of said substrate layer or the thickness of said one or more neutral mechanical surface adjusting layers.

10. The method of claim 4, wherein said laterally patterning comprises modulating a mechanical property of said substrate layer or said one or more neutral mechanical surface adjusting layers;

and wherein said mechanical property is selected from the group consisting of porosity, extent of cross linking and Young'"'"'s modulus.

11. The method of claim 1, wherein said one or more neutral mechanical surface adjusting layers comprises one or more encapsulating layer.

12. The method of claim 11, wherein said one or more encapsulating layer has a thickness that varies selectively in a lateral direction.

13. The method of claim 1, wherein said functional layer comprises a pop-up interconnect.

14. The method of claim 1, further comprising positioning the neutral mechanical plane to be coincident with or proximate to the functional layer that is most sensitive to strain-induced failure.

20. The method of claim 1, wherein said functional layer comprises a component of an electronic device, wherein said component comprises a plurality of serpentine interconnects.

21. The method of claim 1, wherein said substrate layer comprises a polymer, an elastomer, a semiconductor, an inorganic polymer, an organic polymer, fabric, vinyl, latex, spandex, leather or paper.

22. The method of claim 1, wherein said multilayer device further comprises an isolation layer interspersed between a portion of said substrate layer and a portion of said functional layer, and wherein said isolation layer isolates at least a portion of said functional layer from an applied strain.

23. The method of claim 1, wherein said functional layer comprises a semiconductor thin film layer, multiple semiconductor layers separated by support layers, or a plurality of patterned elements.

24. The method of claim 23, wherein said functional layer comprises a plurality of patterned elements, and wherein said patterned elements comprise interconnects.

25. The method of claim 1, wherein said functional layer comprises curved interconnects that connect rigid device islands.

26. The method of claim 25, wherein the curved interconnects are in plane, out of plane, or a combination thereof.

27. The method of claim 25, wherein the curved interconnects are encapsulated with uncured, liquid prepolymer.

28. The method of claim 1, wherein the neutral mechanical surface is positioned proximate to a strain-sensitive material of said functional layer to provide an at least 50% reduction in strain in the strain sensitive material for a given folded configuration.

29. The method of claim 1, wherein the neutral mechanical surface is positioned less than 2 mm from a strain sensitive material of said functional layer.

30. The method of claim 1, wherein the neutral mechanical surface is positioned less than 10 μ

m from a strain sensitive material of said functional layer.

31. The method of claim 1, wherein the neutral mechanical surface is positioned within a layer that is adjacent to the functional layer.

32. The method of claim 1, further comprising:

providing a carrier layer surface and coating at least a portion of said carrier surface with a sacrificial layer;

attaching said substrate layer to said sacrificial layer, wherein said substrate layer supports at least a component of said electronic device;

patterning a plurality of sacrificial layer access openings through said substrate layer; and

releasing said substrate layer from said carrier layer surface by introducing a sacrificial-removing material to said sacrificial layer via said access openings, thereby obtaining a stretchable and foldable electronic device.

15. A method of making an electronic device having a curved surface, said method comprising:

providing a multilayer device comprising a substrate layer, a functional layer and one or more neutral mechanical surface adjusting layers,

wherein said functional layer is supported by a substrate layer,

wherein at least one of said one or more neutral mechanical surface adjusting layers is disposed above said functional layer,

wherein at least one of said one or more neutral mechanical surface adjusting layers of said multilayer device has a property that is spatially inhomogeneous relative to a location in said multilayer device,

wherein said spatially inhomogeneous property positions a spatially varying neutral mechanical surface coincident with or proximate to said functional layer;

wherein spatial variations in said spatially inhomogeneous property causes said spatially varying neutral mechanical surface to be positioned at different distances from a top surface of the multilayer device in different spatial regions of the multilayer device, relative to said functional layer

providing a curvilinear surface; and

conformally wrapping said curvilinear surface with said multilayer device, thereby making an electronic device with a curved surface.

16. The method of claim 15, wherein said functional layer comprises a component of an electronic device, wherein said component comprises a plurality of serpentine interconnects.

17. The method of claim 15, wherein said one or more neutral mechanical surface adjusting layers comprises one or more encapsulating layer.

18. The method of claim 15, wherein said functional layer comprises a semiconductor thin film layer, multiple semiconductor layers separated by support layers, or a plurality of patterned elements.

19. The method of claim 18, wherein said wherein said functional layer comprises a plurality of patterned elements, and wherein said patterned elements comprise interconnects.