X-Y address type solid state image pickup device and method of producing the same

• US 8,552,483 B2
• Filed: 07/03/2012
• Issued: 10/08/2013
• Est. Priority Date: 07/11/2001
• Status: Expired due to Term

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Suzuki, Ryoji, Mabuchi, Keiji, Mori, Tomonori
• Primary Examiner(s): Smith, Bradley K
• Assistant Examiner(s): Belousov, Alexander
• Application Number:
  US13/541,428
• Publication Number:
  US 20120267691A1
• Time in Patent Office: 462 Days
• Field of Search: 257/294, 257/184, 257/187, 257/292, 257/444, 257/E31.058
• US Class Current: 257/294
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14621 Colour filter arrangements
• CPC Class Codes: H01L 27/14623 Optical shielding
• CPC Class Codes: H01L 27/14627 Microlenses
• CPC Class Codes: H01L 27/14632 Wafer-level processed structures
• CPC Class Codes: H01L 27/1464 Back illuminated imager structures
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 27/14685 Process for coatings or optical elements
• CPC Class Codes: H01L 27/14687 Wafer level processing
• CPC Class Codes: H01L 27/14689 MOS based technologies
• CPC Class Codes: H01L 31/02164 for shielding light, e.g. light blocking layers, cold shields for infrared detectors
• CPC Class Codes: H01L 31/0232 Optical elements or arrangements associated with the device H01L31/0236 takes precedence; for photovoltaic cells H01L31/054; for photovoltaic modules H02S40/20
• CPC Class Codes: H01L 31/02327 the optical elements being integrated or being directly associated to the device, e.g. back reflectors optical coatings H01L31/0216
• CPC Class Codes: H04N 25/79 Arrangements of circuitry being divided between different or multiple substrates, chips or circuit boards, e.g. stacked image sensors

Abstract

In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein. and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer. wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.

Claims

1. An imaging device comprising:

a well region of a first conductivity type within a semiconductor layer, said well region being between a first surface of the semiconductor layer and a light-receiving surface of the semiconductor layer;

a first layer of the first conductivity type within said semiconductor layer, said first surface being between an interlayer insulating film and said first layer;

a photo-electric conversion region of a second conductivity type within said semiconductor layer, said photo-electric conversion region being between said first layer and said light-receiving surface;

an isolation region of the first conductivity type within said semiconductor layer, said isolation region being between said first surface and said light-receiving surface;

a back side layer of the first conductivity type at said light-receiving surface, said back side layer extending into said semiconductor layer,

wherein said back side layer is in physical contact with said isolation region, said well region being physical contact with said first layer and said photo-electric conversion region.

2. The device of claim 1, wherein said first surface is opposite to said light-receiving surface.

3. The device of claim 1, wherein said first layer is at said first surface, said first layer extending into said semiconductor layer.

4. The device of claim 1, wherein said well region is at said first surface, said well region extending into said semiconductor layer.

5. The device of claim 1, further comprising:

electrodes and wirings within said interlayer insulating film.

6. The device of claim 1, wherein a surface area of the photo-electric conversion region is largest at said back side layer.

7. The device of claim 1, wherein said back side layer is in physical contact with said well region and said photo-electric conversion region.

8. The device of claim 1, wherein said photo-electric conversion region is between said back side layer and said first layer.

9. The device of claim 1, wherein said photo-electric conversion region is in physical contact with said back side layer and said first layer.

10. The device of claim 1, further comprising:

an insulator between said back side layer and a light-shielding film, an opening portion being a hole through said light-shielding film.

11. The device of claim 10, further comprising:

a color filter between said opening portion and a micro-lens.

12. The device of claim 10, wherein said light-shielding film is a metallic layer.

13. The device of claim 10, wherein said photo-electric conversion region is configured to convert a spectrum of light into a signal charge, said light being transmissible through said opening portion.

14. The device of claim 13, further comprising:

a gate electrode configured to transfer said signal charge from said photo-electric conversion region.

15. The device of claim 1, wherein said first conductivity type is P-type.

16. The device of claim 1, wherein said second conductivity type is N-type.

17. The device of claim 1, wherein said first conductivity type is opposite to said second conductivity type.