Three-dimensional semiconductor architecture
First Claim
Patent Images
1. A semiconductor device comprising:
- a substrate with a first side and a second side opposite the first side, the substrate on the second side having a peripheral region and an interior region surrounded by the peripheral region;
a plurality of devices located on the first side of the substrate, the plurality of devices being at least part of the substrate;
a first set of conductive vias extending entirely through the substrate, the one or more conductive vias being located in the peripheral region; and
a second set of conductive vias extending entirely through the substrate, the one or more conductive vias being located in the interior region, wherein the second set of conductive vias are part of a power matrix.
1 Assignment
0 Petitions
Accused Products
Abstract
A system and method for making semiconductor die connections with through-silicon vias (TSVs) are disclosed. TSVs are formed through the substrate to allow for signal connections as well as power and ground connections. In one embodiment this allows these connections to be made throughout the substrate instead of on the periphery of the substrate. In another embodiment, the TSVs are used as part of a power matrix to supply power and ground connections to the active devices and metallization layers through the substrate.
-
Citations
19 Claims
-
1. A semiconductor device comprising:
-
a substrate with a first side and a second side opposite the first side, the substrate on the second side having a peripheral region and an interior region surrounded by the peripheral region; a plurality of devices located on the first side of the substrate, the plurality of devices being at least part of the substrate; a first set of conductive vias extending entirely through the substrate, the one or more conductive vias being located in the peripheral region; and a second set of conductive vias extending entirely through the substrate, the one or more conductive vias being located in the interior region, wherein the second set of conductive vias are part of a power matrix. - View Dependent Claims (2, 3, 4, 5, 6, 7)
-
-
8. A semiconductor device comprising:
-
a substrate with a first side and a second side; devices and a metallization region located on the first side of the substrate, the metallization region being located further from the substrate than the devices, wherein at least a portion of the substrate is part of the devices; conductive vias extending completely through the substrate to make physical contact with the metallization region and to make electrical contact to the devices through the metallization layer; and a power matrix located on the second side of the substrate. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15)
-
-
16. A method of manufacturing a semiconductor device, the method comprising:
-
providing a substrate with a first side and a second side, wherein the first side is planar; forming devices and a metallization region over the first side of the substrate, wherein the forming devices further comprises forming at least a portion of the devices within the substrate; forming a power matrix over the second side of the substrate and forming conductive vias to connect the power matrix to the devices and metallization region, each of the conductive vias extending totally through the substrate. - View Dependent Claims (17, 18, 19)
-
Specification