Image display apparatus

• US 8,552,655 B2
• Filed: 11/18/2011
• Issued: 10/08/2013
• Est. Priority Date: 05/25/2009
• Status: Active Grant

• Current Assignee: JDI Design and Development GK
• Original Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Inventors: Ono, Shinya
• Primary Examiner(s): Hammond, Crystal L
• Application Number:
  US13/299,622
• Publication Number:
  US 20120062130A1
• Time in Patent Office: 690 Days
• Field of Search: None
• US Class Current: 315/187
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2300/0465 Improved aperture ratio, e.g. by size reduction of the pixel circuit, e.g. for improving the pixel density or the maximum displayable luminance or brightness
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2300/0852 being a dynamic memory with more than one capacitor
• CPC Class Codes: G09G 2300/0861 with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
• CPC Class Codes: G09G 2300/0866 by means of changes in the pixel supply voltage
• CPC Class Codes: G09G 2320/0209 Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display
• CPC Class Codes: G09G 2320/0223 Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element

Abstract

An image display apparatus according to an implementation of the present invention includes: pixel circuits disposed in rows and columns; first power lines and control lines disposed in respective rows; a third power line; second switching transistors disposed at least one for each of the rows and each having a gate terminal connected to the control line disposed in the corresponding row, one of a source terminal and a drain terminal connected to the first power line disposed in the corresponding row, and the other of the source terminal and the drain terminal connected to the third power line; and a power supply unit which supplies the same voltage to the first power lines and the third power line when the second switching transistors are turned ON.

Claims

1. An image display apparatus comprising a pixel array unit,

wherein the pixel array unit includes:

a plurality of pixels disposed in rows and columns;

signal lines disposed in the respective columns;

scanning lines, first power lines, and control lines disposed in the respective rows; and

a second power line,

each of the pixels includes;

a first switching transistor having a gate terminal, a source terminal, and a drain terminal, the gate terminal being connected to one of the scanning lines that is disposed in a corresponding one of the rows, and one of the source terminal and the drain terminal being connected to one of the signal lines that is disposed in a corresponding one of the columns;

a drive transistor having a gate terminal, a source terminal, and a drain terminal, the gate terminal being electrically connected to the other of the source terminal and the drain terminal of the first switching transistor, and one of the source terminal and the drain terminal being electrically connected to one of the first power lines that is disposed in the corresponding row; and

a luminescence element having a first terminal and a second terminal and generating photons according to a value of a current flowing between the first terminal and the second terminal, the first terminal being connected to the second power line, and the second terminal being electrically connected to the other of the source terminal and the drain terminal of the drive transistor,

the pixel array unit further includes;

a third power line for use in connecting the first power lines to each other along the columns; and

second switching transistors disposed at least one for each of the rows and each having a gate terminal, a source terminal, and a drain terminal, the gate terminal being connected to one of the control lines that is disposed in a corresponding one of the rows, one of the source terminal and the drain terminal being connected to one of the first power lines that is disposed in the corresponding row, and the other of the source terminal and the drain terminal being connected to the third power line,

the image display apparatus further comprises

a power supply unit configured to supply a same voltage to the first power lines and the third power line when the second switching transistors are turned ON and, and

the first power lines are connected to each other via the third power line when the second switching transistors are turned ON.

2. The image display apparatus according to claim 1,

wherein each of the pixels further includes

a capacitive element connected between the gate terminal of the drive transistor and the other of the source terminal and the drain terminal of the drive transistor.

3. The image display apparatus according to claim 1,

wherein the power supply unit is configured to supply a first voltage to the third power line and includes an electric supply line drive unit configured to (i) supply the first voltage to one of the first power lines that is disposed in one of the rows in which one of the control lines is disposed, before a corresponding one of the second switching transistors is turned ON to activate the control line and (ii) supply a second voltage to the first power line disposed in the row in which the control line is disposed, after the second switching transistor is turned OFF to deactivate the control line, the second voltage being different from the first voltage.

4. The image display apparatus according to claim 3,

wherein the power supply unit further includes

a voltage generation unit having at least first, second, third, and ground level output terminals and configured to generate the first voltage and the second voltage against a ground level,

the third power line is connected to the third output terminal,

the electric supply line drive unit is connected to the first output terminal and the second output terminal,

the voltage generation unit is configured to output the first voltage to the first output terminal and the third output terminal before the second switching transistors are turned ON, and

the electric supply line drive unit is configured to turn the second switching transistors ON while the voltage generation unit outputs the first voltage to the first output terminal and the third output terminal, to cause the power supply unit to supply the same voltage to the first power lines and the third power line.

5. The image display apparatus according to claim 3, comprising

a drive unit including the electric supply line drive unit,

wherein the drive unit is further configured to selectively output a reference voltage and a signal voltage to each of the signal lines and output a scanning signal for turning the first switching transistor ON or OFF to each of the signal lines,

the second voltage is lower than the reference voltage by a threshold voltage of the drive transistor or more, and

the drive unit is configured to perform:

a reset operation of setting the gate terminal of the drive transistor at the reference voltage and setting a potential of the other of the source terminal and the drain terminal of the drive transistor to the second voltage by supplying the second voltage to the first power line, supplying the reference voltage to the signal line, and turning the first switching transistor ON;

a threshold voltage detection operation of changing a difference in voltage between the gate terminal of the drive transistor and the other of the source terminal and the drain terminal of the drive transistor to a voltage corresponding to the threshold voltage of the drive transistor by supplying the first voltage to the first power line, supplying the reference voltage to the signal line, and turning the first switching transistor ON after the reset operation; and

a write operation of setting the difference in voltage between the gate terminal of the drive transistor and the other of the source terminal and the drain terminal of the drive transistor to a sum of the signal voltage and the voltage corresponding to the threshold voltage by supplying the first voltage to the first power line, supplying the signal voltage to the signal line, and turning the first switching transistor ON after the reset operation.

6. The image display apparatus according to claim 1,

wherein the second switching transistors are disposed in a one-to-one correspondence with the pixels.

7. The image display apparatus according to claim 1,

wherein the number of the second switching transistors is smaller than the number of the pixels.

8. The image display apparatus according to claim 7,

the pixels include:

a red pixel which emits red light;

a green pixel which emits green light; and

a blue pixel which emits blue light, and

the second switching transistors are disposed in units of the pixels, each of the units including the red pixel, the green pixel, and the blue pixel.

9. The image display apparatus according to claim 7,

wherein the second switching transistors are disposed in a staggered manner.

10. The image display apparatus according to claim 1,

wherein the third power line is composed of third power line portions disposed in the respective columns, and

the other of the source terminal and the drain terminal of each of the second switching transistors is connected to one of the third power line portions that is disposed in a corresponding one of the rows.

11. The image display apparatus according to claim 1,

wherein the third power line forms a grid.

12. The image display apparatus according to claim 1,

wherein the third power line forms a plane which covers the pixels.

13. The image display apparatus according to claim 1,

wherein the third power line is composed of third power line portions disposed in the respective rows, and

wiring resistance of each of the third power line portions is smaller than wiring resistance of each of the first power lines.