Flash memory organization

• US 8,555,141 B2
• Filed: 06/04/2009
• Issued: 10/08/2013
• Est. Priority Date: 06/04/2009
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: LSI Corporation (Broadcom, Inc.)
• Inventors: Hicken, Michael, Swatosh, Timothy, Dell, Martin
• Primary Examiner(s): Decady, Albert
• Assistant Examiner(s): Ahmed, Enam
• Application Number:
  US12/477,996
• Publication Number:
  US 20100313097A1
• Time in Patent Office: 1,587 Days
• Field of Search: 714/763
• US Class Current: 714/763
• CPC Class Codes: G06F 11/1068 in sector programmable memories, e.g. flash disk G06F11/1072 takes precedence
• CPC Class Codes: G11C 16/04 using variable threshold transistors, e.g. FAMOS

Abstract

A flash-memory system is organized into a plurality of blocks and a plurality of pages in each block, each page having 2^N data locations and K spare locations. At least one page in the memory has 2^M user data sectors and each sector has 2^N-M+L locations therein. Because L is at least 1 but less than 2^N-M, user data is stored in the spare memory locations. By storing user data in spare locations that were previously off-limits to user data, enterprise-sized sectors can be efficiently stored in flash memories with little wasted memory, thereby making flash-memory systems compatible with existing hard-drive storage systems in enterprise system applications.

Claims

1. A flash-memory system comprising:

a plurality of blocks and a plurality of pages in each block, at least one page having 2N data memory locations and K spare memory locations;

wherein the at least one page is configured to have 2M user data sectors for storing user data, each data sector having 2N−

M+L memory locations therein,

wherein error-correction code (ECC) data segments are related to and stored adjacent to the corresponding data sectors,

wherein metadata is divided up and placed into the ECC data segments,

wherein the spare memory locations include a remainder segment configured to be allocated to store additional ECC data or metadata,

wherein M, N, L, and K are positive integers, N>

M, M≧

1, and 1≦

L<

2N−

M.

2. The apparatus of claim 1, wherein the memory system is further configured to store at least a portion of at least one user data sector in at least one of the spare memory locations.

3. The apparatus of claim 1, wherein the memory system is further configured to store at least one error-correction code (ECC) data segment, related to a corresponding one of the 2M user data sectors, in at least the spare memory locations.

4. The apparatus of claim 1, wherein the memory system is further configured to store at least one error-correction code (ECC) data segment, related to a corresponding one of the 2M user data sectors, in at least one of the data memory locations adjacent the corresponding user data sector.

5. The apparatus of claim 1, wherein 2^M(2^N-M+L)≦

2N+K, L=2^P, where P is a positive integer.

6. The apparatus of claim 5, wherein the memory is arranged in bytes, M=3, N=12, and P=3 or 4, and K=224.

7. The apparatus of claim 5, wherein the memory is arranged in bytes, M=4, N=13, P=3, 4, or 5, and K=520.

8. The apparatus of claim 5, wherein the memory system is further configured to store error-correction code (ECC) data configured into 2M ECC segments, each ECC segment related to a corresponding one of the 2M user data sectors.

9. The apparatus of claim 8, wherein the ECC segments are stored in at least the spare memory locations.

10. The apparatus of claim 8, wherein each of the ECC segments is stored adjacent to the corresponding data sector.

11. The apparatus of claim 10, wherein each of the ECC segments additionally stores metadata.

12. A method of retaining user data in a memory system, the method comprising:

providing a flash-memory system organized into a plurality of blocks and a plurality of pages in each block, at least one of the pages having 2^N data locations and K spare locations, the at least one page having 2^M user data sectors therein, each sector having 2^N-M+L locations therein, where M, N, L, and K are positive integers, N>

M, M≧

1, 1≦

L<

2^N-M; and

storing user data in at least one of the 2^M user data sectors;

storing error-correction code (ECC) data segments adjacent to the corresponding data sectors;

dividing metadata;

placing the divided metadata into the ECC data segments; and

allocating a remainder segment of the spare memory locations to store additional ECC data or metadata.

13. The method of claim 12, wherein at least a portion of a user data sector is capable of being stored in at least one of the spare memory locations.

14. The method of claim 12, further comprising the steps of:

calculating an error-correction code (ECC) data segment for at least one of the 2^M user data sectors; and

storing the ECC data segment in at least the spare locations.

15. The method of claim 14, further comprising the steps of:

reading user data in a user data sector in at least one of the pages;

reading the ECC data segment corresponding to the read user data sector; and

checking and, if required, correcting the read user data using the read ECC data segment.

16. The method of claim 12, further comprising the step of:

Calculating a error-correction code (ECC) data segment for each of the 2^M user data sectors in the at least one page and storing the ECC data segment adjacent the corresponding user data sector.

17. The method of claim 16, wherein each of the ECC data segments additionally stores metadata.

18. The method of claim 16, further comprising the steps of:

reading user data in a user data sector in at least one of the pages;

reading the ECC data segment corresponding to the read user data sector; and

checking and, if required, correcting the read user data using the read ECC data segment.

19. The method of claim 12, wherein L=2^P, P is a positive integer.

20. The method of claim 19, wherein the memory is arranged in bytes, M=3, N=12, P=3 or 4, and K=224.

21. The method of claim 19, wherein the memory is arranged in bytes, M=4, N=13, P=3, 4 or 5, and K=520.

22. A method comprising:

providing a flash-memory system having a plurality of pages, at least one of the pages having 2^N data locations and K spare locations;

storing user data in at least one of 2^M user data sectors in the at least one page, each of the sectors having 2^N-M+L locations therein;

calculating a error correction code (ECC) data segment for at least one of the user data sectors and storing the ECC data segment adjacent the corresponding user data sector;

reading user data in a user data sector in at least one of the pages;

reading the ECC data segment corresponding to the read user data sector;

checking and, if required, correcting the read user data using the read ECC data segment;

wherein M, N, L, and K are positive integers, N>

M, M≧

1, 1≦

L<

2^N-M and wherein at least a portion of the at least one user data sector is stored in at least one of the spare locations in the at least one page;

storing error-correction code (ECC) data segments adjacent to the corresponding data sectors;

dividing metadata;

placing the divided metadata into the ECC data segments; and

allocating a remainder segment of the spare memory locations to store additional ECC data or metadata.

23. The method of claim 22, wherein the memory system is arranged in bytes, N=12, M=3, L=2^P, P=3 or 4, and K=224.