Semiconductor device and method for manufacturing the same

• US 8,557,641 B2
• Filed: 06/29/2010
• Issued: 10/15/2013
• Est. Priority Date: 06/30/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Sasaki, Toshinari, Sakata, Junichiro, Ohara, Hiroki, Yamazaki, Shunpei
• Primary Examiner(s): Toledo, Fernando L
• Assistant Examiner(s): Newton, Valerie N
• Application Number:
  US12/826,000
• Publication Number:
  US 20110053322A1
• Time in Patent Office: 1,204 Days
• Field of Search: None
• US Class Current: 438/149
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02664 Aftertreatments planarisation in general H01L21/304
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

An object is to provide a high reliable semiconductor device including a thin film transistor having stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which an oxide semiconductor film is used for a semiconductor layer including a channel formation region, heat treatment (which is for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor film and reduce impurities such as moisture. Besides impurities such as moisture existing in the oxide semiconductor film, heat treatment causes reduction of impurities such as moisture existing in the gate insulating layer and those in interfaces between the oxide semiconductor film and films which are provided over and below the oxide semiconductor film and are in contact with the oxide semiconductor film.

Claims

1. A method for manufacturing a semiconductor device comprising the steps of:

forming an oxide semiconductor layer over an insulating layer;

heating the oxide semiconductor layer under an inert atmosphere at a temperature equal to or higher than 450°

C. to increase a carrier concentration in the oxide semiconductor layer to 1×

10¹⁸ cm<sup>−

3</sup> or more; and

forming an oxide insulating layer to reduce a carrier concentration in at least a part of the oxide semiconductor layer in contact with the oxide insulating layer to less than 1×

10¹⁸ cm<sup>−

3</sup>,

wherein, after heating, a hydrogen concentration in the oxide semiconductor layer is less than 3×

10²⁰ cm<sup>−

3</sup>.

2. The method for manufacturing a semiconductor device according to claim 1, wherein the inert atmosphere is a nitrogen atmosphere or a rare gas atmosphere.

3. The method for manufacturing a semiconductor device according to claim 1, further comprising, cooling the oxide semiconductor layer to a temperature equal to or higher than room temperature and lower than 100°

C. after heating.

4. The method for manufacturing a semiconductor device according to claim 1 further comprising forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer before forming the oxide insulating layer.

5. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises a crystal.

6. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises indium and zinc.

7. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises a material selected from the group consisting of In—

Sn—

Zn—

O-based oxide semiconductor;

an In—

Al—

Zn—

O-based oxide semiconductor;

a Sn—

Ga—

Zn—

O-based oxide semiconductor;

an Al—

Ga—

Zn—

O-based oxide semiconductor;

a Sn—

Al—

Zn—

O-based oxide semiconductor;

an In—

Zn—

O-based oxide semiconductor;

an In—

Ga—

O-based oxide semiconductor;

a Sn—

Zn—

O-based oxide semiconductor;

an Al—

Zn—

O-based oxide semiconductor;

an In—

O—

based oxide semiconductor;

a Sn—

O-based oxide semiconductor; and

a Zn—

O-based oxide semiconductor.

8. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises an intrinsic oxide semiconductor.

9. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises an oxide semiconductor in an oxygen-excess state by formation of the oxide insulating layer.

10. A method for manufacturing a semiconductor device comprising the steps of:

forming an oxide semiconductor layer over an insulating layer;

heating the oxide semiconductor layer under an inert atmosphere at a temperature equal to or higher than 450°

C. to increase a carrier concentration in the oxide semiconductor layer to 1×

10¹⁸ cm<sup>−

3</sup> or more;

forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer;

heating the oxide semiconductor layer under an oxide atmosphere; and

forming an oxide insulating layer to reduce a carrier concentration in at least a part of the oxide semiconductor layer in contact with the oxide insulating layer to less than 1×

10¹⁸ cm<sup>−

3</sup>,

wherein, after heating under the oxide atmosphere, a hydrogen concentration in the oxide semiconductor layer is less than 3×

10²⁰ cm<sup>−

3</sup>.

11. The method for manufacturing a semiconductor device according to claim 10, wherein the source electrode layer and the drain electrode layer in contact with the oxide semiconductor layer comprise a material selected from titanium and molybdenum.

12. The method for manufacturing a semiconductor device according to claim 10, wherein the oxide semiconductor layer comprises a crystal.

13. The method for manufacturing a semiconductor device according to claim 10, wherein the oxide semiconductor layer comprises indium and zinc.

14. The method for manufacturing a semiconductor device according to claim 10, wherein the oxide semiconductor layer comprises a material selected from the group consisting of In—

Sn—

Zn—

O-based oxide semiconductor;

an In—

Al—

Zn—

O-based oxide semiconductor;

a Sn—

Ga—

Zn—

O-based oxide semiconductor;

an Al—

Ga—

Zn—

O-based oxide semiconductor;

a Sn—

Al—

Zn—

O-based oxide semiconductor;

an In—

Zn—

O-based oxide semiconductor;

an In—

Ga—

O-based oxide semiconductor;

a Sn—

Zn—

O-based oxide semiconductor;

an Al—

Zn—

O-based oxide semiconductor;

an In—

O—

based oxide semiconductor;

a Sn—

O-based oxide semiconductor; and

a Zn—

O-based oxide semiconductor.

15. The method for manufacturing a semiconductor device according to claim 10, wherein the oxide semiconductor layer comprises an intrinsic oxide semiconductor.

16. The method for manufacturing a semiconductor device according to claim 10, wherein the oxide semiconductor layer comprises an oxide semiconductor in an oxygen-excess state by formation of the oxide insulating layer.

17. The method for manufacturing a semiconductor device according to claim 10, wherein the inert atmosphere is a nitrogen atmosphere or a rare gas atmosphere.