Display panel and display apparatus having the same
First Claim
1. A display apparatus comprising:
- a display panel including a display area and a peripheral area, gate and source lines being formed in the display area, a gate driving part and first and second clock lines being formed in the peripheral area, the gate driving part outputting gate signals to the gate line, the first and second clock lines respectively transmitting first and second clock signals to the gate driving part, and the first and second clock signals having substantially same time constant;
a source tape carrier package (TCP) on which a source driving chip outputting a data signal to the source lines is mounted, including dummy terminals electrically connected to the first and second clock lines to receive the first and second clock signals; and
a source printed circuit board (PCB) electrically connected to the display panel through the source TCP.
2 Assignments
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Accused Products
Abstract
In a display panel and a display apparatus having the display panel, the display panel includes array and opposite substrates. The array substrate includes display and peripheral areas. Gate and source lines are formed in the display area. A gate driving part and first and second clock lines are formed in the peripheral area. The gate driving part outputs gate signals to the gate line. The first and second clock lines respectively transmit first and second clock signals to the gate driving part. The opposite substrate is combined with the array substrate and includes a common electrode layer. The common electrode layer has an opening portion patterned to expose the first and second clock lines. The exposed portions of the first and second clock lines have substantially the same area. Thus, delays of the gate signals may be minimized and distortion of the gate signals may be prevented.
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Citations
12 Claims
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1. A display apparatus comprising:
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a display panel including a display area and a peripheral area, gate and source lines being formed in the display area, a gate driving part and first and second clock lines being formed in the peripheral area, the gate driving part outputting gate signals to the gate line, the first and second clock lines respectively transmitting first and second clock signals to the gate driving part, and the first and second clock signals having substantially same time constant; a source tape carrier package (TCP) on which a source driving chip outputting a data signal to the source lines is mounted, including dummy terminals electrically connected to the first and second clock lines to receive the first and second clock signals; and a source printed circuit board (PCB) electrically connected to the display panel through the source TCP. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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Specification