System and method for executing functional scanning in an integrated circuit environment
First Claim
1. A method, comprising:
- executing a functional test for an integrated circuit;
observing a failure associated with the integrated circuit; and
executing a functional scan mode in order to reproduce the failure associated with the integrated circuit, wherein a functional state of the integrated circuit is locked when the failure occurs, and wherein the functional state is subsequently recovered for a structure test for the integrated circuit.
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Accused Products
Abstract
An example method is provided and includes executing a functional test for an integrated circuit and observing a failure associated with the integrated circuit. The method also includes executing a functional scan mode in order to reproduce the failure associated with the integrated circuit. A functional state of the integrated circuit is locked when the failure occurs, and the functional state is subsequently recovered for a structure test for the integrated circuit. In more particular embodiments, particular states of the functional test are evaluated and compared against other states associated with a model circuit that did not experience any failure in order to identify a latest cycle of the integrated circuit that could trigger the failure and an earliest cycle of the integrated circuit that could observe the failure.
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Citations
20 Claims
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1. A method, comprising:
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executing a functional test for an integrated circuit; observing a failure associated with the integrated circuit; and executing a functional scan mode in order to reproduce the failure associated with the integrated circuit, wherein a functional state of the integrated circuit is locked when the failure occurs, and wherein the functional state is subsequently recovered for a structure test for the integrated circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. Non-transitory computer readable media that includes code for execution and when executed by a processor perform operations comprising:
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executing a functional test for an integrated circuit; observing a failure associated with the integrated circuit; and executing a functional scan mode in order to reproduce the failure associated with the integrated circuit, wherein a functional state of the integrated circuit is locked when the failure occurs, and wherein the functional state is subsequently recovered for a structure test for the integrated circuit. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. An apparatus, comprising:
an integrated circuit that includes a clock controller coupled to core logic and to a circuit state element, wherein the apparatus is configured to; execute a functional test for an integrated circuit; observe a failure associated with the integrated circuit; and execute a functional scan mode in order to reproduce the failure associated with the integrated circuit, wherein a functional state of the integrated circuit is locked when the failure occurs, and wherein the functional state is subsequently recovered for a structure test for the integrated circuit. - View Dependent Claims (16, 17, 18, 19, 20)
Specification