Method, system, and program product to implement C-routing for double pattern lithography
First Claim
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1. A computer implemented method for routing an electronic circuit design, the method implemented with a processor, the method comprising:
- performing global routing for the electronic design to generate a high-level routing for the electronic design;
using a processor to perform C-routing for the electronic design using the high-level routing generated from the global routing, whereinthe C-routing provides color seeding for spacetiles in one or more conduits using a marking including a first color and a second color, in which a spacetile comprises a region that provides an allowable area for introducing one or more routing paths, andthe first color corresponds to a first manufacturing pattern mask and the second color corresponds to a second manufacturing pattern mask; and
performing detail routing based at least in part upon one or more color-seeded spacetiles from the C-routing.
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Abstract
Disclosed are a method, apparatus, and computer program product to implement routing for double patterning lithography. A three-phase routing scheme is employed, comprising a global router, a C-router, and a detail router. The C-router provides double patterning color seeding for shapes on routing tracks in the electronic design. The detail router employs space-tiles to perform double-patterning based routing for wires in the electronic design.
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Citations
21 Claims
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1. A computer implemented method for routing an electronic circuit design, the method implemented with a processor, the method comprising:
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performing global routing for the electronic design to generate a high-level routing for the electronic design; using a processor to perform C-routing for the electronic design using the high-level routing generated from the global routing, wherein the C-routing provides color seeding for spacetiles in one or more conduits using a marking including a first color and a second color, in which a spacetile comprises a region that provides an allowable area for introducing one or more routing paths, and the first color corresponds to a first manufacturing pattern mask and the second color corresponds to a second manufacturing pattern mask; and performing detail routing based at least in part upon one or more color-seeded spacetiles from the C-routing. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A computer program product embodied on a non-transitory computer usable medium, the non-transitory computer readable medium having stored thereon a sequence of instructions which, when executed by a processor causes the processor to execute a method for routing an electronic circuit design, the method comprising:
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performing global routing for the electronic design to generate a high-level routing for the electronic design; using a processor to perform C-routing for the electronic design using the high-level routing generated from the global routing, wherein the C-routing provides color seeding for spacetiles in conduits using a marking including a first color and a second color, in which a spacetile comprises a region that provides an allowable area for introducing one or more routing paths, and the first color corresponds to a first manufacturing pattern mask and the second color corresponds to a second manufacturing pattern mask; and performing detail routing based at least in part upon one or more color-seeded spacetiles from the C-routing. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A system for routing an electronic circuit design, comprising:
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a processor; a memory for holding programmable code, wherein the programmable code includes instructions which, when executed by the processor, causes the processor to; perform global routing for the electronic design to generate a high-level routing for the electronic design, perform C-routing for the electronic design using the high-level routing generated from the global routing, wherein the C-routing provides color seeding for spacetiles in one or more conduits using a marking including a first color and a second color, in which a spacetile comprises a region that provides an allowable area for introducing one or more routing paths, and the first color corresponds to a first manufacturing pattern mask and the second color corresponds to a second manufacturing pattern mask, and perform detail routing based at least in part upon one or more color-seeded spacetiles from the C-routing. - View Dependent Claims (16, 17, 18, 19, 20, 21)
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Specification