Electronic fuse structure formed using a metal gate electrode material stack configuration

• US 8,564,089 B2
• Filed: 11/08/2010
• Issued: 10/22/2013
• Est. Priority Date: 03/31/2010
• Status: Active Grant

• Current Assignee: Globalfoundries US Incorporated (GlobalFoundries, Inc.)
• Original Assignee: GlobalFoundries, Inc.
• Inventors: Kurz, Andreas, Schwan, Christoph, Hoentschel, Jan
• Primary Examiner(s): Jahan, Bilkis
• Application Number:
  US12/941,595
• Publication Number:
  US 20110241086A1
• Time in Patent Office: 1,079 Days
• Field of Search: 257/209, 257/528, 257/529, 257/665, 257/288, 257/E23.149
• US Class Current: 257/529
• CPC Class Codes: H01L 23/5256 comprising fuses, i.e. connections having their state changed from conductive to non-conductive
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/3011 Impedance

Abstract

In sophisticated semiconductor devices, electronic fuses may be provided on the basis of a replacement gate approach by using the aluminum material as an efficient metal for inducing electromigration in the electronic fuses. The electronic fuse may be formed on an isolation structure, thereby providing an efficient thermal decoupling of the electronic fuse from the semiconductor material and the substrate material, thereby enabling the provision of efficient electronic fuses in a bulk configuration, while avoiding incorporation of fuses into the metallization system.

Claims

1. A semiconductor device, comprising:

a transistor element comprising a gate electrode structure, said gate electrode structure being formed above a first device region and comprising a gate material stack, said gate material stack consisting of an insulating material layer and a plurality of conductive material layers positioned above said insulating material layer, wherein said material layers of said gate material stack are arranged in a gate stack layered arrangement, said insulating material layer comprising a high-k dielectric material and said plurality of material layers comprising a metal-containing electrode material and at least one non-aluminum conductive material layer, said metal-containing electrode material comprising aluminum; and

an electronic fuse comprising an electronic fuse material stack formed above a second device region, said electronic fuse material stack consisting of the same material layers as are present in said gate material stack, wherein said same material layers in said electronic fuse material stack are arranged in a same layered arrangement as said gate stack layered arrangement and wherein at least said non-aluminum conductive material layer is formed on dielectric sidewalls of said electronic fuse so as to laterally confine said aluminum comprising said metal-containing electrode material of said electronic fuse.

2. The semiconductor device of claim 1, wherein said first device region comprises a semiconductor region that is directly connected to a crystalline semiconductor material of a substrate of said semiconductor device.

3. The semiconductor device of claim 1, wherein said second device region has a lower heat conductivity than said first device region.

4. The semiconductor device of claim 1, wherein said second device region comprises an isolation region embedded in a semiconductor material.

5. The semiconductor device of claim 1, wherein both of said insulating material layer and said at least one non-aluminum conductive material layer are formed on said dielectric sidewalls of said electronic fuse so as to laterally confine said aluminum of said metal-containing electrode material of said electronic fuse.

6. The semiconductor device of claim 1, wherein said at least one non-aluminum conductive material layer and said aluminum form a layer stack that extends between a sidewall spacer structure so as to directly connect to said sidewall spacer structure.

7. The semiconductor device of claim 1, wherein said at least one non-aluminum conductive material layer comprises a titanium nitride layer.

8. The semiconductor device of claim 1, wherein said gate electrode structure has a gate length of approximately 50 nm or less.

9. The semiconductor device of claim 1, further comprising a contact level comprising a dielectric material formed laterally adjacent to and above said electronic fuse and said gate electrode structure, wherein said contact level further comprises contact elements so as to connect to said gate electrode structure and said electronic fuse.

10. The semiconductor device of claim 1, wherein said metal-containing electrode material comprises a metal species for adjusting a work function of said gate electrode structure.

11. The semiconductor device of claim 10, wherein said metal species comprises lanthanum.

12. A semiconductor device, comprising:

an electronic fuse formed on an isolation region that is laterally embedded in a semiconductor layer, said electronic fuse comprising an electronic fuse material stack formed above said isolation region, wherein said electronic fuse material stack comprises at least one conductive metal-containing non-aluminum layer and an aluminum layer formed on said at least one conductive metal-containing non-aluminum layer, wherein either of said aluminum layer and said at least one conductive metal-containing non-aluminum layer comprises a substantially vertical portion formed adjacent to dielectric sidewalls of said electronic fuse; and

a transistor comprising a metal gate electrode structure, said metal gate electrode structure being formed above said semiconductor layer and comprising a metal gate electrode material stack that is the same as said electronic fuse material stack.

13. The semiconductor device of claim 12, wherein said at least one conductive metal-containing non-aluminum layer has an internal stress level of 1 Giga Pascal (GPa) or higher.

14. The semiconductor device of claim 12, wherein said electronic fuse further comprises a plurality of contact elements in conductive contact with said electronic fuse material stack.

15. The semiconductor device of claim 12, where said electronic fuse further comprises a high-k dielectric material formed at least between said at least one conductive metal-containing non-aluminum layer and said isolation region.

16. The semiconductor device of claim 15, wherein either of said high-k dielectric material and said at least one conductive metal-containing non-aluminum layer of said electronic fuse comprises a work function metal species for adjusting a work function of said gate electrode structure of said transistor.

17. A semiconductor device, comprising:

a transistor element comprising a gate electrode structure, said gate electrode structure comprising a gate insulation layer formed of a high-k gate dielectric material and a gate electrode formed of a metal-containing electrode material, said metal-containing electrode material comprising aluminum and at least one conductive non-aluminum material layer; and

an electronic fuse comprising said high-k dielectric material and said metal-containing electrode material, wherein said high-k dielectric material and said at least one conductive non-aluminum material layer are formed on dielectric sidewalls of said electronic fuse so as to laterally confine at least said aluminum comprising said metal-containing electrode material.