Boost buffer aid for reference buffer

• US 8,564,252 B2
• Filed: 11/09/2007
• Issued: 10/22/2013
• Est. Priority Date: 11/10/2006
• Status: Expired due to Fees

• Current Assignee: Monterey Research, LLC (Vector Capital Corporation)
• Original Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Inventors: Williams, Timothy J., Raimar, Nandakishore
• Primary Examiner(s): Tso, Edward
• Assistant Examiner(s): PIGGUSH, AARON C
• Application Number:
  US11/983,578
• Publication Number:
  US 20080203977A1
• Time in Patent Office: 2,174 Days
• Field of Search: 320/134, 320/136, 320/157, 320/162, 320/166, 320/138
• US Class Current: 320/166
• CPC Class Codes: G06F 1/26 Power supply means, e.g. regulation thereof for memories G11C
• CPC Class Codes: H03K 17/962 Capacitive touch switches
• CPC Class Codes: H03K 2217/960725 Charge-transfer

Abstract

A circuit for charging a capacitive load to a reference voltage in a capacitive sensor measurement circuit includes a reference buffer, a boost buffer, and drive logic. The reference buffer and the boost buffer are coupled with the capacitive load to be charged. The boost buffer first charges the capacitive load towards the reference voltage at a first rate of charging, and then ceases charging. The reference buffer subsequently continues charging at a slower second rate to settle the voltage across the capacitive load to within a tolerable range of the reference voltage.

Claims

1. A method, comprising:

charging a capacitive load comprising a capacitive touch sensor at a first rate of charging with a first digital-to-analog current source to cause a voltage level of the capacitive load to approach a predetermined reference voltage level;

terminating the charging the capacitive load at the first rate of charging, wherein the terminating comprises disabling the first digital-to-analog current source in response to receiving an indication that the voltage level of the capacitive load has reached a threshold voltage away from the predetermined reference voltage level; and

charging the capacitive load at a second rate of charging with a second digital-to-analog current source to cause the voltage level of the capacitive load to approach a predetermined final voltage level, wherein the first rate of charging is faster than the second rate of charging.

2. The method according to claim 1, wherein the charging the capacitive load at the first rate of charging comprises operating the first digital-to-analog current source connected with the capacitive load to drive current into the capacitive load.

3. The method according to claim 1, further comprising monitoring the voltage level of the capacitive load with a comparator concurrently with the charging the capacitive load at the first rate of charging.

4. The method according to claim 3, further comprising beginning the monitoring the voltage level of the capacitive load with a timer in response to receiving an indication that a current is being driven into the capacitive load.

5. The method according to claim 1, wherein the charging the capacitive load at the second rate of charging comprises operating the second digital-to-analog current source connected with the capacitive load to settle the voltage level of the capacitive load towards the predetermined final voltage level.

6. The method according to claim 1,

wherein a capacitance of the capacitive load is determined based on recording a number of counts of a timer detected during the charging the capacitive load at the second rate of charging with the second digital-to-analog current source.

7. A method comprising:

charging a capacitive load comprising a capacitive touch sensor at a first rate of charging with a first digital-to-analog current source to cause a voltage level of the capacitive load to approach a predetermined reference voltage level;

terminating the charging the capacitive load at the first rate of charging;

charging the capacitive load at a second rate of charging with a second digital-to-analog current source to cause the voltage level of the capacitive load to approach a predetermined final voltage level, wherein the first rate of charging is faster than the second rate of charging; and

disabling the second digital-to-analog current source in response to receiving an indication from the timer that a time period has elapsed and that indicates that the voltage level of the capacitive load has reached a threshold voltage away from the predetermined final voltage level.

8. An apparatus for charging a capacitive load, comprising:

a first digital-to-analog current source configured to charge the capacitive load comprising a capacitive touch sensor at a first rate of charging to cause a voltage across the capacitive load to approach a predetermined reference voltage level;

a drive logic module coupled with the first digital-to-analog current source, wherein the drive logic module is configured to control an output state of the first digital-to-analog current source;

a second digital-to-analog current source coupled with the capacitive load, wherein the second digital-to-analog current source is configured to charge the capacitive load at a second rate of charging to cause the voltage across the capacitive load to approach a predetermined final voltage level, wherein the first rate of charging is faster than the second rate of charging; and

a comparator module coupled with the drive logic module, wherein the comparator module is configured to monitor the voltage across the capacitive load, and wherein the drive logic module is further configured to disable the first digital-to-analog current source in response to receiving an indication from the comparator module that the voltage across the capacitive load has reached a threshold voltage away from the predetermined reference voltage level.

9. The apparatus according to claim 8, wherein the comparator module is configured to begin monitoring the voltage across the capacitive load in response to a second indication that a current is being driven into the capacitive load.

10. The apparatus according to claim 8, wherein the drive logic module is configured to disable the first digital-to-analog current source by tristating an output of the first digital-to-analog current source.

11. The apparatus according to claim 8, wherein the capacitive load comprises a modulation capacitor coupled with the current driver.

12. An apparatus comprising:

a first digital-to-analog current source configured to charge a capacitive load comprising a capacitive touch sensor at a first rate of charging to cause a voltage across the capacitive load to approach a predetermined reference voltage level;

a drive logic module coupled with the first digital-to-analog current source, wherein the drive logic module is configured to control an output state of the first digital-to-analog current source;

a second digital-to-analog current source coupled with the capacitive load, wherein the second digital-to-analog current source is configured to charge the capacitive load at a second rate of charging to cause the voltage across the capacitive load to approach a predetermined final voltage level, wherein the first rate of charging is faster than the second rate of charging; and

a reference buffer control module configured to control an output state of the second digital-to-analog current source, wherein the reference buffer control module is configured to disable the second digital-to-analog current source in response to receiving an indication from a timer that a time period has elapsed and that indicates that the voltage level of the capacitive load has reached a threshold voltage away from the predetermined final voltage level.