Symmetrically operating single-ended input buffer devices and methods
First Claim
1. An apparatus, comprising:
- a first transistor configured to receive an input signal and adjust a resistance of a second transistor based, at least in part, on the input signal, the first transistor configured to provide an output signal based, at least in part, on the input signal,wherein a rate at which the output signal is provided is based, at least in part, on a magnitude of the resistance of the second transistor.
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Accused Products
Abstract
Embodiments are described including those pertaining to an input buffer having first and second complementary input terminals. One example buffer has a symmetrical response to a single input signal applied to the first input terminal by mimicking the transition of a signal applied to the second input terminal in the opposite direction. The buffer includes two amplifier circuits structured to be complementary with respect to each other. Each of the amplifier circuits includes a first transistor having a first input node that receives an input signal transitioning across a range of high and low voltage levels, and a second transistor having a second input node that receives a reference signal. The first input node is coupled to the second transistor through a capacitor to mimic the second input node transitioning in the direction opposite to the transition of the input signal.
23 Citations
20 Claims
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1. An apparatus, comprising:
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a first transistor configured to receive an input signal and adjust a resistance of a second transistor based, at least in part, on the input signal, the first transistor configured to provide an output signal based, at least in part, on the input signal, wherein a rate at which the output signal is provided is based, at least in part, on a magnitude of the resistance of the second transistor. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. An apparatus, comprising:
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a first transistor configured to receive an input signal and provide an output signal based, at least in part, on the input signal; and a second transistor having an ON-resistance, the ON-resistance based, at least in part, on a magnitude of a voltage of the input signal and a magnitude of a reference voltage, wherein the output signal is based, at least in part, on the ON-resistance. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A method, comprising:
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receiving an input signal at a terminal of a first transistor; adjusting a resistance of a second transistor based, at least in part, on the input signal; providing, with the first transistor, an output signal at a rate, the rate based, at least in part, on the resistance. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification