Systems and methods for controlling the transmission and reception of packets over a common antenna

• US 8,565,198 B1
• Filed: 10/07/2011
• Issued: 10/22/2013
• Est. Priority Date: 12/26/2007
• Status: Active Grant

• Current Assignee: Marvell Asia Pte Limited (Marvell Technology Group Limited)
• Original Assignee: Marvell International Limited (Marvell Technology Group Limited)
• Inventors: Tran, Ninh, Li, Timothy
• Primary Examiner(s): Qureshi, Afsar M
• Application Number:
  US13/269,112
• Time in Patent Office: 746 Days
• Field of Search: 370232-345, 455/41.2, 455/63.3, 455/414.3, 455/450, 455/552.1, 455/509, 455/556.1, 725 62- 98, 375/132, 375/135, 375/260
• US Class Current: 370/336
• CPC Class Codes: H04W 72/0446 Resources in time domain, e.g. slots or frames
• CPC Class Codes: H04W 72/1215 for collaboration of different radio technologies
• CPC Class Codes: H04W 74/002 Transmission of channel access control information
• CPC Class Codes: H04W 88/04 adapted for relaying to or from another terminal or user

Abstract

A system including i) first wireless communication circuitry to receive and transmit packets of a first type via an antenna, and ii) second wireless communication circuitry to receive and transmit packets of a second type via the antenna. The packets of the second type are transmitted and received during time slots having a predefined length, and the time slots are separated by time intervals during which no packets of the second type are transmitted or received by the second wireless communication circuitry. The system further includes an arbiter to control access of the first wireless communication circuitry and the second wireless communication circuitry to the antenna, wherein the arbiter causes the packets of the first type to be transmitted and received by the first wireless communication circuitry during the time intervals during which no packets of the second type are transmitted or received by the second wireless communication circuitry.

Claims

1. A wireless communication system, comprising:

first wireless communication circuitry to receive and transmit packets of a first type via an antenna;

second wireless communication circuitry to receive and transmit packets of a second type via the antenna, wherein the packets of the second type are transmitted and received during time slots having a predefined length, and wherein the time slots are separated by time intervals during which no packets of the second type are transmitted or received by the second wireless communication circuitry; and

an arbiter to control access of the first wireless communication circuitry and the second wireless communication circuitry to the antenna, wherein the arbiter causes the packets of the first type to be transmitted and received by the first wireless communication circuitry during the time intervals during which no packets of the second type are transmitted or received by the second wireless communication circuitry.

2. The wireless communication system of claim 1, wherein the predefined length of the time intervals is calculated to maximize a throughput of the packets of the first type and to maintain a predetermined throughput of the packets of the second type.

3. The wireless communication system of claim 1, further comprising:

front end connection and logic circuitry to respectively route packets of the first type and packets of the second type from the antenna to the first wireless communication circuitry and the second wireless communication circuitry.

4. The wireless communication circuitry of claim 1, wherein the first wireless communication circuitry and the second wireless communication circuitry operate in a same frequency band.

5. The wireless communication circuitry of claim 1, wherein the packets of the second type are transmitted using a preselected number of back-to-back time slots.

6. The wireless communication circuitry of claim 5, wherein the preselected number of back-to-back time slots is selected to maximize the throughput of the packets of the first type and to maintain the desired throughput of the packets of the second type.

7. A method of controlling access of first wireless communication circuitry and second wireless communication circuitry to a single antenna, the method comprising;

permitting the first wireless communication circuitry to access the single antenna and transmit or receive packets of a first type during time slots, wherein the time slots are separated by time intervals during which no packets of the first type are transmitted or received by the short range wireless communication circuitry, and wherein the time intervals have a predefined length; and

permitting the second wireless communication circuitry to access the single antenna and transmit or receive packets of a second type during the time intervals during which no packets of the first type are transmitted or received by the first wireless communication circuitry.

8. The method of claim 7, wherein the predefined length of the time intervals is calculated to maximize a throughput of the packets of the second type and to maintain a predetermined throughput of the packets of the second type.

9. The method of claim 7, wherein the first wireless communication circuitry and the second wireless communication circuitry operate in the same frequency band.

10. A wireless communication system, comprising:

means for receiving and transmitting data packets via an antenna;

means for receiving and transmitting audio packets via the antenna, wherein the audio packets are transmitted and received during time slots having a predefined length, and wherein the time slots are separated by time intervals during which no audio packets are transmitted or received; and

means for controlling access to the antenna by causing the data packets to be transmitted and received during the time intervals during which no audio packets are transmitted or received.

11. The wireless communication system of claim 10, wherein the predefined length of the time intervals is calculated to maximize a throughput of the data packets and to maintain a predetermined throughput of the audio packets.

12. The wireless communication circuitry of claim 10, wherein the audio packets are transmitted using a preselected number of back-to-back time slots.

13. The wireless communication circuitry of claim 12, wherein the preselected number of back-to-hack time slots is selected to maximize the throughput of the data packets and to maintain the desired throughput of the audio packets.