Circuits, systems, and methods for managing automatic gain control in quadrature signal paths of a receiver

• US 8,565,358 B2
• Filed: 01/30/2012
• Issued: 10/22/2013
• Est. Priority Date: 01/07/2009
• Status: Active Grant

• Current Assignee: Skyworks Solutions Incorporated
• Original Assignee: Skyworks Solutions Incorporated
• Inventors: Komaili, Jaleh, Vasa, John E., Obkircher, Thomas
• Primary Examiner(s): Vlahos, Sophia
• Application Number:
  US13/361,247
• Publication Number:
  US 20120134402A1
• Time in Patent Office: 631 Days
• Field of Search: 375/345, 375/346, 375349-351, 455/136, 455/138, 455/232.1, 455/234.1, 455/239.1, 455/241.1, 455/242.1, 455/242.2, 455/245.1, 455/245.2, 455/246.1, 455/247.1, 455/250.1, 455/139, 455/296, 455/253.2, 455/345, 455/346, 455/234.2
• US Class Current: 375/345
• CPC Class Codes: H03G 3/3089 Control of digital or coded signals
• CPC Class Codes: H04L 27/2647 Arrangements specific to the receiver only equalisation H04L27/01
• CPC Class Codes: H04L 27/3809 Amplitude regulation arrangements

Abstract

A system provides closed-loop gain control in a WCDMA mode and open loop control in an EDGE/GSM mode. Gain control is distributed across analog devices and a digital scaler in a wireless receiver. In the WCDMA mode, a loop filter generates an error signal that is forwarded to analog and digital control paths. The analog control path includes a first adder, a programmable hysteresis element, and a lookup table. The analog control signal is responsive to thresholds, which when used in conjunction with a previous gain value determine a new gain value. The digital control path includes a second adder, a programmable delay element, and a converter. A control word is responsive to a difference of the error signal, a calibration value, and the analog control signal. Blocker detection is provided in the WCDMA mode of operation. A controller sets system parameters using a state machine.

Claims

1. A method for managing automatic gain control in quadrature signal paths of a radio-frequency subsystem of a wireless communication system, the method comprising:

determining a first signal strength at an input to a channel select filter in a digital receiver path and a second signal strength at an output of the channel select filter;

comparing the first and second signal strengths to detect whether a blocker is present in the quadrature signal paths of a receiver of the radio-frequency subsystem;

in response to detecting the blocker, forwarding a blocker presence signal to an analog control branch of an automatic gain control circuit, the automatic gain control circuit including a loop filter coupled to the analog control branch and a digital control branch, the digital control branch generating a digital control word configured to adjust a scaler coupled to the channel select filter; and

in response to not detecting the blocker, determining a difference between the second signal strength at the output of the channel select filter and a reference signal power, and applying the difference between the second signal strength and the reference signal power to the automatic gain control circuit.

2. The method of claim 1 further comprising converting a representation of the second signal strength from a linear scale to a logarithmic scale to generate a converted representation of the second signal strength in decibels.

3. The method of claim 2 further comprising applying the converted representation of the second signal strength in decibels to a correction algorithm to generate a corrected representation of the second signal strength in decibels.

4. The method of claim 1 further comprising determining the reference signal power as a function of an average signal energy and a peak signal energy in the radio-frequency subsystem.

5. The method of claim 4 further comprising adjusting the reference signal power based on a predetermined margin for the reference signal power.

6. The method of claim 1 wherein the loop filter operates at a ratio of a sampling frequency and a number of samples in a window used to determine the second signal strength.

7. The method of claim 1 wherein the analog control branch includes a first feedback adder, a programmable hysteresis element, and a lookup table.

8. The method of claim 7 wherein the programmable hysteresis element is implemented based on one or more thresholds, which are used in conjunction with a previous gain value to determine a new gain value.

9. The method of claim 8 further comprising generating a phase correction control signal in conjunction with an analog gain change of a low noise amplifier.

10. The method of claim 8 wherein a rate of change of the analog gain is a function of a window used to determine the second signal strength, a sampling rate, and an analog gain change hysteresis value.

11. The method of claim 1 wherein the digital control branch includes an adder and a programmable delay element, and the digital control branch determines a digital gain value as a function of a filtered error signal from the loop filter and an analog gain value from the analog control branch.

12. The method of claim 11 further comprising applying the digital gain value to a converter that translates the digital gain value from a logarithmic scale to a linear scale.

13. The method of claim 7 further comprising:

providing a gain value from a baseband controller to the analog control branch;

loading the lookup table;

bypassing the programmable hysteresis element; and

applying an analog gain control signal from the lookup table to the at least one controllable gain element in the analog receiver path.

14. The method of claim 13 further comprising providing the gain value from the baseband controller to a digital control branch.

15. The method of claim 1 wherein, in response to detecting the blocker, the method further comprises generating an analog control signal in the analog control branch of the automatic gain control circuit and applying the analog control signal to at least one controllable gain element in an analog receiver path to prevent saturation of an analog-to-digital converter in the digital receiver path of the radio-frequency subsystem.

16. A system for automatic gain control in a radio-frequency subsystem of a wireless communication system, the system for automatic gain control comprising:

a power estimator configured to receive a first input from a digital receiver path and a second input from a channel select filter and to generate a first estimate of the signal power present at an output of the digital receiver path and a second estimate of the signal power present at the output of the channel select filter;

a blocker identification element arranged to receive the first estimate and the second estimate from the power estimator and configured to generate a blocker presence signal when a function of the first estimate and the second estimate exceeds a threshold value;

a converter coupled to an output of the power estimator and configured to generate a logarithmic representation of the first estimate of the signal power at the output of the digital receiver path; and

an automatic gain control circuit arranged to receive the blocker presence signal and a difference of a reference signal and the logarithmic representation of the first estimate of the signal power at the output of the digital receiver path, the automatic gain control circuit including an analog control branch configured to generate a control signal and to generate a phase compensation signal when the control signal directs a change in a gain of a low noise amplifier.

17. The system of claim 16 wherein the automatic gain control circuit includes:

a loop filter, the analog control branch being coupled to one or more elements in an analog receiver path; and

a digital control branch configured to generate a control word coupled to a scaler.

18. The system of claim 17 wherein the gain in the radio-frequency subsystem is modified based on the control signal and the control word.

19. The system of claim 17 wherein the analog control branch includes a first feedback adder, a programmable hysteresis element, and a lookup table.

20. The system of claim 17 wherein the analog control branch receives a first calibration value, provides an indication of receive signal strength to a baseband element, and generates the control signal.

21. The system of claim 17 wherein the digital control branch includes a second feedback adder, a programmable delay element, and a converter element, the digital control branch arranged to receive a second calibration signal and an error signal from the loop filter.

22. The system of claim 21 wherein the digital control branch receives the control signal at the second feedback adder and generates the control word responsive to a difference of the error signal and a delayed representation of the control signal.

23. The system of claim 22 wherein the digital control branch translates the difference of the error signal and the delayed representation of the control signal from a first value on a logarithmic scale to a converted value on a linear scale.

24. A circuit for automatic gain control in a radio-frequency subsystem of a wireless communication system, the circuit comprising:

a receiver including an analog receiver path coupled to a digital receiver path; and

a radio-frequency automatic gain control circuit including an analog control branch having a first feedback adder and a lookup table, the analog control branch configured to generate an analog control signal to adjust at least one controllable gain element in the analog receiver path, and a digital control branch having a second feedback adder, a programmable delay element, and a converter element, the digital control branch configured to generate a control word responsive to a gain value received from a baseband element, a second calibration value, and a delayed representation of the analog control signal.

25. The circuit of claim 24 wherein the analog control branch further includes a programmable hysteresis element operating in a bypass mode.

26. The circuit of claim 24 wherein the analog control branch provides an indication of receive signal strength to the baseband element and is arranged to adjust one or more of a low-noise amplifier, a transimpedance amplifier, and a programmable gain amplifier in the analog receiver path.

27. The circuit of claim 24 wherein the digital control branch translates a combination of the gain value received from the baseband element, the second calibration value and the delayed representation of the analog control signal from a logarithmic scale to a linear scale.

28. The circuit of claim 24 wherein an output of the digital receiver path is coupled to a scaler.

29. The circuit of claim 24 wherein the analog control branch is responsive to a gain value received from the baseband element and a first calibration value.