Load instruction for communicating with adapters

• US 8,566,480 B2
• Filed: 06/23/2010
• Issued: 10/22/2013
• Est. Priority Date: 06/23/2010
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Craddock, David, Farrell, Mark S., Gregg, Thomas A., Greiner, Dan F.
• Primary Examiner(s): SUN, SCOTT C
• Application Number:
  US12/821,182
• Publication Number:
  US 20110320764A1
• Time in Patent Office: 1,217 Days
• Field of Search: None
• US Class Current: 710/5
• CPC Class Codes: G06F 9/30043 LOAD or STORE instructions; Clear instruction

Abstract

Communication with adapters of a computing environment is facilitated. Instructions are provided that explicitly target the adapters. Information provided in an instruction is used to steer the instruction to an appropriate location within the adapter.

Claims

1. A computer program product for executing a load instruction for loading data from an adapter, said computer program product comprising:

a computer readable storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising;

obtaining, by a processor coupled to the adapter, a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising;

an opcode field identifying a load from adapter instruction;

a first field identifying a first location at which data fetched from the adapter will be loaded;

a second field identifying a second location, the contents of which include a function handle identifying the adapter, a designation of an address space within the adapter from which data is to be loaded, and an offset within the address space; and

executing, by the processor, the machine instruction, the executing comprising;

using the function handle to obtain a function table entry associated with the adapter, the function table entry stored in memory associated with the processor;

determining a data address of the adapter using at least one of information in the function table entry and the offset; and

fetching data from a specific location in the address space identified by the designation of the address space, the specific location identified by the data address determined based on execution of the machine instruction by the processor.

2. The computer program product of claim 1, wherein the address space to be accessed is one of a memory space or an I/O space, and wherein the determining the data address comprises using one or more parameters of the function table entry to determine the data address.

3. The computer program product of claim 2, wherein the using comprises adding a value of a base address register of the function table entry to the offset to determine the data address.

4. The computer program product of claim 1, wherein the address space to be accessed is a configuration space, and wherein the data address is the offset provided by the instruction, the offset identifying a register number in the configuration space.

5. The computer program product of claim 1, wherein the execution further comprises placing the data in the first location designated by the instruction, and wherein the contents of the second location include an amount of data to be fetched.

6. The computer program product of claim 1, wherein the using the function handle comprises using a function number of the function handle to index into a function table stored in memory associated with the processor to obtain the function table entry.

7. The computer program product of claim 1, wherein the instruction is implemented based on the architecture of the adapter.

20. The computer program product of claim 1, wherein the load from adapter instruction is to load data from the adapter without using memory mapped I/O.

8. A computer system for executing a load instruction for loading data from an adapter, said computer system comprising:

a memory; and

a processor in communications with the memory, wherein the computer system is configured to perform a method, said method comprising;

obtaining, by a processor configured to be coupled to an adapter, a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising;

an opcode field identifying a load from adapter instruction;

a first field identifying a first location at which data fetched from the adapter will be loaded;

a second field identifying a second location, the contents of which include a function handle identifying the adapter, a designation of an address space within the adapter from which data is to be loaded, and an offset within the address space; and

executing, by the processor, the machine instruction, the executing comprising;

using the function handle to obtain a function table entry associated with the adapter, the function table entry stored in memory associated with the processor;

determining a data address of the adapter using at least one of information in the function table entry and the offset; and

fetching data from a specific location in the address space identified by the designation of the address space, the specific location identified by the data address determined based on execution of the machine instruction by the processor.

9. The computer system of claim 8, wherein the address space to be accessed is one of a memory space or an I/O space, and wherein the determining the data address comprises using one or more parameters of the function table entry to determine the data address.

10. The computer program product of claim 9, wherein the using comprises adding a value of a base address register of the function table entry to the offset to determine the data address.

11. The computer system of claim 8, wherein the address space to be accessed is a configuration space, and wherein the data address is the offset provided by the instruction, the offset identifying a register number in the configuration space.

12. The computer system of claim 8, wherein the execution further comprises placing the data in the first location designated by the instruction.

13. The method of claim 8, wherein the contents of the second location include an amount of data to be fetched.

14. The method of claim 8, wherein the instruction is implemented based on the architecture of the adapter.

15. A method of executing a load instruction for loading data from an adapter, said method comprising:

obtaining, by a processor coupled to the adapter, a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising;

an opcode field identifying a load from adapter instruction;

a first field identifying a first location at which data fetched from the adapter will be loaded;

a second field identifying a second location, the contents of which include a function handle identifying the adapter, a designation of an address space within the adapter from which data is to be loaded, and an offset within the address space; and

executing, by the processor, the machine instruction, the executing comprising;

using the function handle to obtain a function table entry associated with the adapter, the function table entry stored in memory associated with the processor;

determining a data address of the adapter using at least one of information in the function table entry and the offset; and

fetching data from a specific location in the address space identified by the designation of the address space, the specific location identified by the data address determined based on execution of the machine instruction by the processor.

16. The method of claim 15, wherein the address space to be accessed is one of a memory space or an I/O space, and wherein the determining the data address comprises using one or more parameters of the function table entry to determine the data address.

17. The method of claim 16, wherein the using comprises adding a value of a base address register of the function table entry to the offset to determine the data address.

18. The method of claim 15, wherein the address space to be accessed is a configuration space, and wherein the data address is the offset provided by the instruction, the offset identifying a register number in the configuration space.

19. The method of claim 15, wherein the execution further comprises placing the data in the first location designated by the instruction, and wherein the contents of the second location include an amount of data to be fetched.