Multilayer printed wiring board

• US 8,569,880 B2
• Filed: 08/27/2010
• Issued: 10/29/2013
• Est. Priority Date: 02/04/2004
• Status: Active Grant

• Current Assignee: Ibiden Co., Ltd.
• Original Assignee: Ibiden Co., Ltd.
• Inventors: Inagaki, Yasushi, Sano, Katsuyuki
• Primary Examiner(s): Such, Matthew W
• Assistant Examiner(s): Kalam, Abul
• Application Number:
  US12/869,841
• Publication Number:
  US 20100321914A1
• Time in Patent Office: 1,159 Days
• Field of Search: 257/700
• US Class Current: 257/700
• CPC Class Codes: H01L 21/4857 Multilayer substrates multilayer metallisation on monolayer substrate H01L21/4846
• CPC Class Codes: H01L 2223/6616 Vertical connections, e.g. vias
• CPC Class Codes: H01L 2223/6622 Coaxial feed-throughs in active or passive substrates
• CPC Class Codes: H01L 2224/0554 External layer
• CPC Class Codes: H01L 2224/0555 Shape
• CPC Class Codes: H01L 2224/0556 Disposition
• CPC Class Codes: H01L 2224/05568 the whole external layer protruding from the surface
• CPC Class Codes: H01L 2224/05573 Single external layer
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/13111 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/81192 wherein the bump connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/81801 Soldering or alloying
• CPC Class Codes: H01L 23/49822 Multilayer substrates multilayer metallisation on monolayer substrate H01L23/498
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 23/50 for integrated circuit devices, e.g. power bus, number of leadsH01L23/482 - H01L23/498 take precedence
• CPC Class Codes: H01L 23/5383 Multilayer substrates H01L23/5385 takes precedence; multilayer metallisation on monolayer substrates H01L23/538
• CPC Class Codes: H01L 23/5386 Geometry or layout of the interconnection structure
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 24/81 using a bump connector
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01004 : Beryllium [Be]
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01012 : Magnesium [Mg]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01019 : Potassium [K]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01025 : Manganese [Mn]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/0103 : Zinc [Zn]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01051 : Antimony [Sb]
• CPC Class Codes: H01L 2924/01058 : Cerium [Ce]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01084 : Polonium [Po]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/15312 : being a pin array, e.g. PGA
• CPC Class Codes: H01L 2924/15787 : Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H01L 2924/19105 : in a side-by-side arrangement on a common die mounting substrate
• CPC Class Codes: H01L 2924/19106 : in a mirrored arrangement on two different side of a common die mounting substrate
• CPC Class Codes: H01L 2924/30105 : Capacitance
• CPC Class Codes: H01L 2924/30107 : Inductance
• CPC Class Codes: H01L 2924/3011 : Impedance
• CPC Class Codes: H01L 2924/351 : Thermal stress
• CPC Class Codes: H05K 1/056 : the metal substrate being covered by an organic insulating layer
• CPC Class Codes: H05K 2201/0352 : Differences between the conductors of different layers of a multilayer
• CPC Class Codes: H05K 2201/09536 : Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
• CPC Class Codes: H05K 2201/09736 : Varying thickness of a single conductor; Conductors in the same plane having different thicknesses
• CPC Class Codes: H05K 2201/098 : Special shape of the cross-section of conductors, e.g. very thick plated conductors
• CPC Class Codes: H05K 3/429 : Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
• CPC Class Codes: H05K 3/4602 : characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
• CPC Class Codes: H05K 3/4608 : comprising an electrically conductive base or core
• CPC Class Codes: H05K 3/4641 : having integrally laminated metal sheets or special power cores

Abstract

A multilayer printed wiring board in which interlayer insulation layer and conductive layer are formed on a multilayer core substrate composed of three or more layers, having through holes for connecting the front surface with the rear surface and conductive layers on the front and rear surfaces and conductive layer in the inner layer to achieve electric connection through via holes, the through holes being composed of power source through holes, grounding through holes and signal through holes connected electrically to a power source circuit or a grounding circuit or a signal circuit of an IC chip, when the power source through holes pass through the grounding conductive layer of the inner layer in the core substrate, of the power source through holes, at least a power source through hole just below the IC having no conductive circuit extending from the power source through hole in the grounding conductive layer.

Claims

1. A multilayer printed wiring board, comprising:

a multilayer core substrate comprising a first outer conductive layer formed on a first surface of the multilayered core substrate, a second outer conductive layer formed on a second surface of the multilayered core substrate, a first inner conductive layer formed between the first and second surfaces of the multilayered core substrate, a second inner conductive layer formed between the first and second surfaces of the multilayered core substrate, and a plurality of through holes connecting the first surface with the second surface,

wherein each of the first and second inner conductive layers has a thickness which is greater than thicknesses of the first and second outer conductive layers, the plurality of through holes includes a plurality of power source through holes connected to a power source circuit and a plurality of grounding through holes connected to a ground circuit, each of the first and second outer conductive layers includes a plurality of grounding conductive layer portions and a plurality of power source conductive layer portions such that the power source through holes are connected to the power source conductive layer portions in the first and second outer conductive layers, respectively, and that the grounding through holes are connected to the grounding conductive layer portions in the first and second outer conductive layers, respectively, and the power source through holes and the grounding through holes are alternately positioned such that each of the power source through holes is surrounded by adjacent ones of the grounding through holes and that each of the grounding through holes is surrounded by adjacent ones of the power source through holes.

3. The multilayer printed wiring board according to claim 1, wherein the first inner conductive layer is a power source conductive layer, the plurality of power source through holes is not connected to the second inner conductive layer and has 70% or more power source through holes having no land portions extending from the power source through holes in the second inner conductive layer.

4. The multilayer printed wiring board according to claim 1, wherein the second inner conductive layer is a grounding conductive layer, and the plurality of grounding through holes is not connected to the first inner conductive layer and includes 70% or more grounding through holes having no land portions extending from the grounding through holes in the first inner conductive layer.

5. The multilayer printed wiring board according to claim 1, further comprising:

an interlayer insulation layer formed on the multilayer core substrate; and

a conductive layer formed on the interlayer insulation layer,

wherein the multilayer core substrate has at least one power source conductive layer, and the conductive layer on the interlayer insulation layer and the power source conductive layer in the multilayer core substrate satisfy α

2<

α

1≦

40 α

2 where α

1 represents a sum of thicknesses of the at least one power source conductive layer in said multilayer core substrate and α

2 represents a thickness of the conductive layer on the interlayer insulation layer.

6. The multilayer printed wiring board according to claim 5, wherein said α

1 is in a relation of 1.2α

2≦

α

1≦

40 α

2.

7. The multilayer printed wiring board according to claim 1, further comprising a capacitor mounted on a surface of the multilayer printed wiring board.

8. The multilayer printed wiring board according to claim 1, further comprising an IC chip mounted over the first surface of the multilayer core substrate, wherein the plurality of through holes includes through holes positioned directly below the IC chip and disposed in a form of a grid or in a staggered fashion.

9. The multilayer printed wiring board according to claim 1, further comprising an IC chip mounted over the first surface of the multilayer core substrate, wherein the plurality of power source through holes and plurality of grounding through holes include through holes positioned directly below the IC chip and disposed alternately in a form of a grid or in a staggered fashion.

10. The multilayer printed wiring board according to claim 1, further comprising an IC chip mounted over the first surface of the multilayer core substrate, wherein the power source through holes and the grounding through holes are disposed in a form of a grid or in a staggered fashion directly below the IC chip.

17. The multilayer printed wiring board according to claim 1, further comprising an IC chip mounted over the first surface of the multilayer core substrate, wherein the plurality of through holes includes a plurality of signal through holes connected to a signal circuit of the IC chip.

2. A multilayer printed wiring board, comprising:

a multilayer core substrate comprising a first conductive layer formed on a first surface of the multilayered core substrate, a second conductive layer formed on a second surface of the multilayered core substrate, a first inner conductive layer formed between the first and second surfaces of the multilayered core substrate, a second inner conductive layer formed between the first and second surfaces of the multilayered core substrate, and a plurality of through holes connecting the first surface with the second surface,

wherein each of the first and second inner conductive layers has a thickness which is greater than thicknesses of the first and second outer conductive layers, the plurality of through holes includes a plurality of power source through holes connected to a power source circuit and a plurality of grounding through holes connected to a ground circuit, each of the first and second outer conductive layers includes a plurality of grounding conductive layer portions and a plurality of power source conductive layer portions, and the power source through holes and the grounding through holes are alternately positioned such that each of the power source through holes is surrounded by adjacent ones of the grounding through holes and that each of the grounding through holes is surrounded by adjacent ones of the power source through holes.

11. The multilayer printed wiring board according to claim 2, further comprising an IC chip mounted over the first surface of the multilayer core substrate, wherein the power source through holes and the grounding through holes are disposed in a form of a grid or in a staggered fashion directly below the IC chip.

12. The multilayer printed wiring board according to claim 2, wherein the first inner conductive layer is a power source conductive layer, and the plurality of power source through holes is not connected to the second inner conductive layer and has 70% or more power source through holes having no land portions extending from the Dower source through holes in the second inner conductive layer.

13. The multilayer printed wiring board according to claim 2, wherein the second inner conductive layer is a grounding conductive layer, and the plurality of grounding through holes is not connected to the first inner conductive layer and includes 70% or more grounding through holes having no land portions extending from the grounding through holes in the first inner conductive layer.

14. The multilayer printed wiring board according to claim 2, further comprising:

an interlayer insulation layer formed on the multilayer core substrate; and

a conductive layer formed on the interlayer insulation layer,

wherein the multilayer core substrate has at least one power source conductive layer, and the conductive layer on the interlayer insulation layer and the power source conductive layer in the multilayer core substrate satisfy α

2<

α

1≦

40 α

2 where α

1 represents a sum of thicknesses of the at least one power source conductive layer in said multilayer core substrate and α

2 represents a thickness of the conductive layer on the interlayer insulation layer.

15. The multilayer printed wiring board according to claim 14, wherein said α

1 is in a relation of 1.2α

2≦

α

1≦

40α

2.

16. The multilayer printed wiring board according to claim 2, further comprising a capacitor mounted on a surface of the multilayer printed wiring board.

18. The multilayer printed wiring board according to claim 2, further comprising an IC chip mounted over the first surface of the multilayer core substrate, wherein the plurality of through holes includes a plurality of signal through holes connected to a signal circuit of the IC chip.