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Reducing peak current in memory systems

  • US 8,572,423 B1
  • Filed: 02/06/2011
  • Issued: 10/29/2013
  • Est. Priority Date: 06/22/2010
  • Status: Active Grant
First Claim
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1. A memory device, comprising:

  • a plurality of memory cells;

    a token input interface;

    a token output interface; and

    control circuitry coupled between the token input interface and the token output interface, wherein the control circuitry is configured to conditionally execute a received storage command dependent on a presence of a token pulse on the token input interface, wherein the token pulse enables execution of at least some storage commands, wherein in response to the presence of the token pulse the control circuitry is configured to execute the storage command in the memory cells, and to reproduce the token pulse on the token output interface upon completion of the execution.

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