Direct injection of data to be transferred in a hybrid computing environment

• US 8,578,132 B2
• Filed: 03/29/2010
• Issued: 11/05/2013
• Est. Priority Date: 03/29/2010
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Archer, Charles J., Blocksome, Michael A., Ratterman, Joseph D., Ricard, Gary R., Smith, Brian E.
• Primary Examiner(s): Caldwell, Andrew
• Assistant Examiner(s): Partridge, William B
• Application Number:
  US12/748,559
• Publication Number:
  US 20110239003A1
• Time in Patent Office: 1,317 Days
• Field of Search: None
• US Class Current: 712/34
• CPC Class Codes: G06F 2209/509 Offload
• CPC Class Codes: G06F 9/5027 the resource being a machine, e.g. CPUs, Servers, Terminals
• CPC Class Codes: G06F 9/544 Buffers; Shared memory; Pipes
• CPC Class Codes: H03M 13/09 Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit

Abstract

Direct injection of a data to be transferred in a hybrid computing environment that includes a host computer and a plurality of accelerators, the host computer and the accelerators adapted to one another for data communications by a system level message passing module. Each accelerator includes a Power Processing Element (‘PPE’) and a plurality of Synergistic Processing Elements (‘SPEs’). Direct injection includes reserving, by each SPE, a slot in a shared memory region accessible by the host computer; loading, by each SPE into local memory of the SPE, a portion of data to be transferred to the host computer; executing, by each SPE in parallel, a data processing operation on the portion of the data loaded in local memory of each SPE; and writing, by each SPE, the processed data to the SPE'"'"'s reserved slot in the shared memory region accessible by the host computer.

Claims

1. A hybrid computing environment for direct injection of data to be transferred, the hybrid computing environment comprising a host computer having a host computer architecture, a plurality of accelerators having an accelerator architecture, the accelerator architecture optimized, with respect to the host computer architecture, for speed of execution of a particular class of computing functions, the host computer and the accelerators adapted to one another for data communications by a system level message passing module, each accelerator further comprising a Power Processing Element (‘

PPE’

) and a plurality of Synergistic Processing Elements (‘

SPEs’

), the hybrid computing environment comprising computer program instructions capable of;

reserving, by each SPE of an accelerator, a slot in a shared memory region accessible by the host computer;

loading, by each SPE of the accelerator from local memory of the accelerator into local memory of each SPE of the accelerator, a portion of data to be transferred to the host computer;

executing, by each SPE of the accelerator in parallel, a data processing operation on the portion of the data loaded in local memory of each SPE of the accelerator; and

writing, by each SPE of the accelerator, the processed data to each SPE of the accelerator'"'"' assigned slot in the shared memory region.

2. The hybrid computing environment of claim 1 wherein the reserved slots comprise a contiguous region of computer memory.

3. The hybrid computing environment of claim 1 wherein the data to be transferred to the host computer resides in non-contiguous local memory of the accelerator prior to being loaded into local memory of each SPE of the accelerator.

4. The hybrid computing environment of claim 1 wherein the data processing operation comprises an endianness conversion.

5. The hybrid computing environment of claim 1 wherein the data processing operation comprises a checksum operation.

6. The hybrid computing environment of claim 1 wherein the data processing operation comprises filtering the data to be transferred according to filtering criteria.

7. The hybrid computing environment of claim 1 wherein the data processing operation comprises encrypting the data to be transferred.

8. The hybrid computing environment of claim 1 further comprising computer program instructions capable of reconfiguring each SPE of the accelerator from performing direct injection to performing other data processing.

9. A computer program product for direct injection of data to be transferred in a hybrid computing environment, the hybrid computing environment comprising a host computer having a host computer architecture, a plurality of accelerators having an accelerator architecture, the accelerator architecture optimized, with respect to the host computer architecture, for speed of execution of a particular class of computing functions, the host computer and the accelerators adapted to one another for data communications by a system level message passing module, each accelerator further comprising a Power Processing Element (‘

PPE’

) and a plurality of Synergistic Processing Elements (‘

SPEs’

), the computer program product disposed in a computer readable non-transitory medium, the computer program product comprising computer program instructions capable of;

reserving, by each SPE of an accelerator, a slot in a shared memory region accessible by the host computer;

loading, by each SPE of an accelerator from local memory of the accelerator into local memory of each SPE of the accelerator, a portion of data to be transferred to the host computer;

executing, by each SPE of the accelerator in parallel, a data processing operation on the portion of the data loaded in local memory of each SPE of the accelerator; and

writing, by each SPE of the accelerator, the processed data to each SPE of the accelerator'"'"' assigned slot in the shared memory region.

10. The computer program product of claim 9 wherein the reserved slots comprise a contiguous region of computer memory.

11. The computer program product of claim 9 wherein the data to be transferred to the host computer resides in non-contiguous local memory of the accelerator prior to being loaded into local memory of each SPE of the accelerator.

12. The computer program product of claim 9 wherein the data processing operation comprises an endianness conversion.

13. The computer program product of claim 9 wherein the data processing operation comprises a checksum operation.

14. The computer program product of claim 9 wherein the data processing operation comprises filtering the data to be transferred according to filtering criteria.

15. The computer program product of claim 9 wherein the data processing operation comprises encrypting the data to be transferred.

16. The computer program product of claim 9 further comprising computer program instructions capable of reconfiguring each SPE of the accelerator from performing direct injection to performing other data processing.