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Reducing aging effect on registers

  • US 8,578,137 B2
  • Filed: 11/03/2006
  • Issued: 11/05/2013
  • Est. Priority Date: 11/03/2006
  • Status: Active Grant
First Claim
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1. A processor comprising:

  • a register to store data;

    a counter to store a first value to indicate a dynamic time amount of how long a portion of the register has maintained an inverted versus a non-inverted value; and

    a first logic to cause storage of a second value in the register in response to a detection that the register is to be released, wherein the first logic causes storage of the second value in the register in response to the first value indicating that the portion of the register has maintained an inverted value for a shorter time period than a non-inverted value.

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