Series connected segmented LED

• US 8,581,267 B2
• Filed: 11/09/2011
• Issued: 11/12/2013
• Est. Priority Date: 11/09/2011
• Status: Active Grant

• Current Assignee: Alpad Corporation
• Original Assignee: Toshiba Techno Center Inc. (Toshiba Corporation)
• Inventors: Lester, Steven D., Chuang, Chih-Wei
• Primary Examiner(s): STARK, JARRETT J
• Application Number:
  US13/292,938
• Publication Number:
  US 20120056193A1
• Time in Patent Office: 734 Days
• Field of Search: None
• US Class Current: 257/88
• CPC Class Codes: H01L 2224/24 of an individual high density interconnect connector
• CPC Class Codes: H01L 27/153 in a repetitive configuration, e.g. LED bars
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/08 with a plurality of light emitting regions, e.g. laterally discontinuous light emitting layer or photoluminescent region integrated within the semiconductor body H01L27/15 takes precedence
• CPC Class Codes: H01L 33/32 containing nitrogen
• CPC Class Codes: H01L 33/387 with a plurality of electrode regions in direct contact with the semiconductor body and being electrically interconnected by another electrode layer
• CPC Class Codes: H01L 33/405 Reflective materials
• CPC Class Codes: H01L 33/46 Reflective coating, e.g. dielectric Bragg reflector
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Abstract

A light source and method for making the same are disclosed. The light source includes a conducting substrate, and a light emitting structure that is divided into segments. The light emitting structure includes a first layer of semiconductor material of a first conductivity type deposited on the substrate, an active layer overlying the first layer, and a second layer of semiconductor material of an opposite conductivity type from the first conductivity type overlying the active layer. A barrier divides the light emitting structure into first and second segments that are electrically isolated from one another. A serial connection electrode connects the first layer in the first segment to the second layer in the second segment. A power contact is electrically connected to the second layer in the first segment, and a second power contact electrically connected to the first layer in the second segment.

Claims

1. A light source comprising:

an electrically-conducting substrate;

a light emitting structure comprising;

a first layer of semiconductor material of a first conductivity type overlying said substrate;

an active layer overlying said first layer; and

a second layer of semiconductor material of an opposite conductivity type from said first conductivity type overlying said active layer;

a barrier that divides said light emitting structure into first and second segments that are electrically isolated from one another;

a connection electrode that connects said first layer in said first segment to said second layer in said second segment; and

a mirror in electrical contact with said first layer in each of said segments, said connection electrode connecting said mirror in said first segment to said second layer in said second segment,

wherein said substrate comprises first and second isolation regions that electrically isolate said minor in said first and second segments from each other, and wherein said electrically-conducting substrate comprises a first conductivity type of silicon and said first and second isolation regions comprise a region of a second conductivity type in said silicon.

2. The light source of claim 1 further comprising:

a first power contact electrically connected to said second layer in said first segment; and

a second power contact electrically connected to said first layer in said second segment, wherein said first and second segments generate light when a potential difference is created between said first and second power contacts.

3. The light source of claim 1 wherein said isolation regions comprise an insulating layer between said minor and said electrically-conducting substrate.

4. The light source of claim 1 wherein said electrically-conducting substrate is bonded to said light emitting structure by a layer of metal.

5. The light source of claim 1 wherein said first layer comprises a p-type GaN family member.

6. The light source of claim 1 wherein said first semiconductor layer comprises an n-type GaN family member.

7. A method for fabricating a light source, said method comprising:

depositing a light emitting structure on a first substrate, said light emitting structure comprising;

a first semiconductor layer of a first conductivity type deposited on said substrate;

an active layer overlying said first layer; and

a second semiconductor layer of an opposite conductivity type from said first conductivity type overlying said active layer;

patterning a metallic minor layer over said second layer and in electrical contact therewith;

depositing a metallic bonding layer overlying said minor layer;

bonding said metallic layer to a second substrate comprising a first conductivity type of silicon;

removing said first substrate thereby exposing said first semiconductor layer;

generating a barrier that divides said light emitting structure into first and second segments that are electrically isolated from one another; and

depositing a serial connection electrode that connects said first layer in said first segment to said second layer in said second segment,

wherein said second substrate comprises a region of a second conductivity type in said silicon, first and second isolation regions electrically isolating said minor in said first and second segments from each other.

8. The method of claim 7 further comprising depositing a first power contact electrically connected to said second layer in said first segment;

and a second power contact electrically connected to said first layer in said second segment, wherein said first and second segments generate light when a potential difference is created between said first and second power contacts.

9. The method of claim 7 wherein said isolation regions comprise an insulating layer between said mirror and said second substrate.

10. The method of claim 7 wherein said second substrate comprises a silicon wafer.

11. The method of claim 7 wherein said first semiconductor layer comprises an n-type GaN family member.