Power MOSFET with embedded recessed field plate and methods of fabrication

• US 8,581,341 B2
• Filed: 04/19/2011
• Issued: 11/12/2013
• Est. Priority Date: 04/20/2010
• Status: Active Grant

• Current Assignee: MaxPower Semiconductor, Inc. (Vishay Intertechnology Incorporated)
• Original Assignee: MaxPower Semiconductor, Inc. (Vishay Intertechnology Incorporated)
• Inventors: Darwish, Mohamed N., Zeng, Jun, Su, Shih-Tzung, Blanchard, Richard A.
• Primary Examiner(s): Lee, Cheung
• Assistant Examiner(s): JOY, JEREMY J
• Application Number:
  US13/089,326
• Publication Number:
  US 20110254088A1
• Time in Patent Office: 938 Days
• Field of Search: 257/340, 257/341, 257/E29.255, 257/330, 257/E29.009
• US Class Current: 257/340
• CPC Class Codes: H01L 21/26586 characterised by the angle between the ion beam and the crystal planes or the main crystal surface
• CPC Class Codes: H01L 29/0623 Buried supplementary region, e.g. buried guard ring multi-RESURF H01L29/0634
• CPC Class Codes: H01L 29/0634 Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/456 on silicon
• CPC Class Codes: H01L 29/66727 with a step of recessing the source electrode
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

Semiconductor power devices, and related methods, wherein a recessed contact makes lateral ohmic contact to the source diffusion, but is insulated from the underlying recessed field plate (RFP). Such an insulated RFP is here referred to as an embedded recessed field plate (ERFP).

Claims

1. A power semiconductor device, comprising:

a semiconductor source region, which is heavily doped with a first conductivity type;

a semiconductor body region, which has a second conductivity type and is located at least partially beneath said source region;

a first trench which extends through said source and body regions, and includes at least one gate electrode which is capacitively coupled to at least part of said body region; and

a second trench which is at least as deep as said first trench, and which contains a field plate covered by an insulator, said second trench extending down through the body region into a first-conductivity-type semiconductor drift region which is more lightly doped than the source region;

a recessed metallic source contact overlying said field plate, but separated therefrom at active device locations by said insulator, and making ohmic contact to said source region;

wherein, at said active device locations, the top of said field plate is deeper than the top of said gate electrode, and the bottom of said field plate is deeper than the bottom of said gate electrode;

whereby said gate electrode can invert at least part of the body region to permit passage of majority carriers from the source region through the inverted part of the body region into the drift region, and the majority carriers can pass through the drift region into a first-conductivity-type drain region;

wherein said body region has a lower surface which is not planar; and

further comprising an additional population of first-conductivity-type dopants surrounding downwardly extending parts of said lower surface.

2. The power semiconductor device of claim 1, further comprising a second-conductivity-type region below the bottom of said second trench.

3. The power semiconductor device of claim 1, wherein said recessed contact is filled with a first metallic material, and is overlain by a patterned conductive layer of a second metallic material.

4. The power semiconductor device of claim 1, wherein said field plate is electrically connected to said source region.

5. The power semiconductor device of claim 1, further comprising a conductive shield electrode in said first trench below said gate electrode.

6. The power semiconductor device of claim 1, wherein said second trench does not have completely vertical sidewalls, and is narrower at the bottom than at the top.

7. The power semiconductor device of claim 1, wherein said gate electrode extends to about the same depth as said field plate.

8. The power semiconductor device of claim 1, wherein at least one of said gate electrode and said recessed field plate comprises doped polysilicon.

9. The power semiconductor device of claim 1, wherein said gate electrode and said recessed field plate are both made of doped polysilicon.

10. The power semiconductor device of claim 1, wherein said source region and said body region define a junction therebetween, and wherein said recessed field plate has a highest point, in at least some locations, which is lower than any nearby portion of said junction.

11. The power semiconductor device of claim 1, further comprising a heavily doped second-conductivity-type region which protrudes down into said drift region, and which has a profile which is self-aligned to an upper corner of the recessed field plate.

12. The power semiconductor device of claim 1, wherein said drift region overlies a heavily doped first-conductivity-type region which is connected as a drain region.

13. The power semiconductor device of claim 1, wherein said first conductivity type is n-type.

14. The device of claim 1, further comprising a third diffusion which lies partly below and is insulated from said recessed field plate.

15. A power semiconductor device, comprising:

a source region having a first conductivity type;

a body region, which has a second conductivity type and is located at least partially beneath said source region;

a first-conductivity-type drain region, and a first-conductivity-type drift region which separates said drain region from said body;

a first trench which extends through said source and body regions, and includes at least one gate electrode which is capacitively coupled to at least part of said body region; and

a second trench which is at least as deep as said first trench, and which contains a field plate;

wherein the field plate is covered by an insulator at least some active device locations;

wherein a shielding portion of said drift region, below said second trench, contains a lower net concentration of first-conductivity-type dopant atoms than said drift region generally; and

wherein, at said active device locations, the top of said field plate is deeper than the top of said gate electrode, and the bottom of said field plate is deeper than the bottom of said gate electrode;

whereby said gate electrode can invert at least part of the body region to permit passage of majority carriers from the source region through the inverted part of the body region into the drift region, and the majority carriers can pass through the drift region into a first-conductivity-type drain region.

16. The power semiconductor device of claim 15, further comprising an additional concentration of first-conductivity-type dopant atoms within said drift region, at depths corresponding to at least some parts of said field plates and at least some parts of said shielding portions.

17. The power semiconductor device of claim 15, wherein said shielding portion has said second conductivity type.

18. The power semiconductor device of claim 15, wherein said shielding portion has said second conductivity type, and has a net dopant concentration which is less than 10¹⁵ cm⁻

3.