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Liquid crystal display panel and liquid crystal display apparatus

  • US 8,581,863 B2
  • Filed: 04/21/2010
  • Issued: 11/12/2013
  • Est. Priority Date: 05/29/2009
  • Status: Expired due to Fees
First Claim
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1. A liquid crystal display panel in which pixel electrodes connected with pixel transistors are arranged to face an opposed electrode through a liquid crystal layer per each pixel and an alignment direction of liquid crystal molecules in the liquid crystal layer changes by controlling a voltage between the pixel electrodes and the opposed electrode, the liquid crystal display panel comprising:

  • scanning lines which extend in parallel to each other and through which ON signals for turning on respective corresponding pixel transistors during a predetermined period are supplied to the respective corresponding pixel transistors;

    first coordinate detection electrodes which are arranged in a predetermined direction, wherein different pluralities of the first coordinate detection electrodes correspond to different ones of the scanning lines;

    first coordinate detection transistors, one of which electrically connects one of the different pluralities of the first coordinate detection electrodes corresponding to one of the scanning lines to an output line commonly connected with the first coordinate detection transistors based on one of the ON signals supplied to the pixel transistors from said one of the scanning lines;

    second coordinate detection electrodes which are arranged along parallel lines perpendicular to the predetermined direction, wherein different pluralities of the second coordinate detection electrodes correspond to different ones of the scanning lines, other than the ones of the scanning lines to which the pluralities of the first coordinate detection electrodes correspond; and

    second coordinate detection transistors, one of which electrically connects one of the different pluralities of the second coordinate detection electrodes corresponding to one of the scanning lines to the output line, which is commonly connected with the second coordinate detection transistors, based on one of the ON signals supplied to the pixel transistors from said one of the scanning lines.

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