Nonvolatile memory device
First Claim
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1. A nonvolatile memory device, comprising:
- a memory cell configured to write data in a magneto-resistance device in response to a write current applied to a bit line and a source line;
a voltage detector configured to sense potentials loaded in the bit line and the source line when a write enable signal is activated;
a write current controller configured to control activation of a write control signal in response to an output of the voltage detector; and
a write driver configured to control amounts of write current applied to the memory cell according to the activation of the write control signal.
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Abstract
A nonvolatile memory device comprises a memory cell configured to store or output data in a magneto-resistance device in response to a write current applied to a bit line and a source line. A voltage detector is configured to sense potentials loaded in the bit line and the source line. A write current controller configured to control activation of a write control signal in response to an output of the voltage detector, and a write driver configured to control amounts of write current applied to the memory cell according to the activation of the write control signal.
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Citations
20 Claims
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1. A nonvolatile memory device, comprising:
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a memory cell configured to write data in a magneto-resistance device in response to a write current applied to a bit line and a source line; a voltage detector configured to sense potentials loaded in the bit line and the source line when a write enable signal is activated; a write current controller configured to control activation of a write control signal in response to an output of the voltage detector; and a write driver configured to control amounts of write current applied to the memory cell according to the activation of the write control signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A nonvolatile memory device, comprising:
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a memory cell configured to perform data read or write operation in response to a write current applied to a bit line and a source line, wherein the memory cell includes, a magneto-resistance device coupled to the bit line, and a switching device located between the magneto-resistance device and the source line, the switching device controlled by a word line; a voltage detector configured to sense potentials loaded in the bit line and the source line when a write enable signal is activated; a write current controller configured to control voltage level of a write control signal in response to an output of the voltage detector; and a write driver configured to control amounts of write current applied to the memory cell, wherein amounts of current flowing through the memory cell are adjusted by the write control signal inputted to a gate of the switching device. - View Dependent Claims (17, 18, 19, 20)
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Specification