Methods, systems and apparatus for computing a voltage advance used in controlling operation of an electric machine

• US 8,583,265 B1
• Filed: 05/22/2012
• Issued: 11/12/2013
• Est. Priority Date: 05/22/2012
• Status: Active Grant

• Current Assignee: GM Global Technology Operations LLC (General Motors Company)
• Original Assignee: GM Global Technology Operations LLC (General Motors Company)
• Inventors: Schulz, Steven E., Grimmer, Michael J., Majarov, Konstantin S., Cawthorne, William R.
• Primary Examiner(s): Jarrett, Ryan A.
• Assistant Examiner(s): SCAPIN, MICHAEL JOSEPH
• Application Number:
  US13/477,281
• Publication Number:
  US 20130314011A1
• Time in Patent Office: 539 Days
• Field of Search: None
• US Class Current: 700/73
• CPC Class Codes: H02P 21/0089 using field weakening
• CPC Class Codes: H02P 23/009 using field weakening
• CPC Class Codes: H02P 25/098 Arrangements for reducing torque ripple
• CPC Class Codes: H02P 6/10 Arrangements for controlling torque ripple, e.g. providing reduced torque ripple
• CPC Class Codes: H02P 6/182 using back-emf in windings

Abstract

Embodiments of the present disclosure relate to methods, systems and apparatus for computing a voltage advance used in controlling operation of an electric machine.

Claims

1. A method, comprising:

iteratively executing a slow-rate task processing loop that executes at a relatively slow-rate during a first task processing period (T_TASK2);

iteratively executing an intermediate-rate task processing loop that executes at an intermediate-rate during a second task processing period (T_TASK1), wherein the step of iteratively executing the intermediate-rate task processing loop, comprises;

computing, at the intermediate-rate (T_TASK1), a new instantaneous switching frequency (f<sub>SW—

new</sub>); and

computing tri-state values for a PWM voltage advance delay time, wherein the tri-state values for the PWM voltage advance delay time comprise;

an initial steady-state value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

inital—

ss</sub>);

an intermediate value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

intermediate</sub>); and

a final steady-state value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

final—

ss</sub>);

iteratively executing a fast-rate task processing loop that executes at a relatively fast-rate during a third task processing period (T_Task0), wherein iteratively executing the fast-rate task processing loop comprises;

computing tri-state values for a PWM voltage advance angle (Δ

θ

) that are used during a transition state when a current actual switching frequency (f_SW) changes to the new instantaneous switching frequency (f<sub>SW—

new</sub>), wherein the tri-state values for the PWM voltage advance angle (Δ

θ

) are computed based on;

a product of the initial steady-state value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

inital—

ss</sub>) and an angular rotor velocity (ω

_r);

a product of the intermediate value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

intermediate</sub>) delay time and the angular rotor velocity (ω

_r); and

a product of the final steady-state value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

final—

ss</sub>) delay time and the angular rotor velocity (ω

_r).

2. A method according to claim 1, wherein the step of iteratively executing the slow-rate task processing loop comprises:

computing, once during each first task processing period (T_TASK2), an average switching frequency (f<sub>SW—

avg</sub>) and a dither span frequency (f_span), wherein the dither span s frequency (f_span) corresponds to an amount of frequency variation allowed when dithering switching frequency (f_SW) to generate switching signals that are applied to an inverter module.

3. A method according to claim 2, wherein the step of iteratively executing the intermediate-rate task processing loop, further comprises:

computing, at the intermediate-rate (T_TASK1) during execution of intermediate-rate task processing loop prior to the execution of a pre-fast-rate task processing loop;

a pseudo-random number (K_rand), and

wherein the step of computing, at the intermediate-rate (T_TASK1), the new instantaneous switching frequency (f<sub>SW—

new</sub>), comprises;

computing, at the intermediate-rate (T_TASK1), the new instantaneous switching frequency (f<sub>SW—

new</sub>) based on the average switching frequency (f<sub>SW—

avg</sub>), the dither span frequency (f_span) and a scaled version of the pseudo-random number (K_rand); and

further comprising;

regularly and consecutively re-initializing time-dependent parameter values used during the fast-rate task processing based on the new instantaneous switching frequency (f<sub>SW—

new</sub>) so that the time-dependent parameter values used during the fast-rate task processing will have been updated with correct values representative of the new instantaneous switching frequency (f<sub>SW—

new</sub>).

4. A method according to claim 1, further comprising:

storing the tri-state values for the PWM voltage advance delay time in a double-buffer that comprises a first page and a second page, wherein contents of the double-buffer are updated twice per switching frequency (f_SW) transition.

5. A method according to claim 4, wherein the step of computing the tri-state values for the PWM voltage advance delay time comprises:

computing the initial steady-state value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

inital—

ss</sub>) during the intermediate-rate task processing loop while operating with an initial switching period (T<sub>SW—

initial</sub>);

computing the intermediate value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

intermediate</sub>), based on the initial switching period (T<sub>SW—

initial</sub>) and a next switching period (T<sub>SW—

next</sub>), wherein the intermediate value is computed during a switching frequency (f_SW) transition state that occurs during execution of intermediate-rate task processing loop; and

computing the final steady-state value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

final—

ss</sub>) during the second task processing period based on the next switching period (T<sub>SW—

next</sub>).

6. A method according to claim 5, wherein the step of storing the tri-state values for the PWM voltage advance delay time, comprises:

storing the initial steady-state value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

inital—

ss</sub>) at the first page prior to execution of a pre-fast-rate task processing loop;

storing the intermediate value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

intermediate</sub>) at the second page for use by a motor control modules, wherein the intermediate value is used to transform a synchronous frame voltage command back to a stationary frame when a first index is toggled during execution of the pre-fast-rate task processing loop; and

storing the final steady-state value in a temporary variable.

7. A method according to claim 6, wherein the step of executing the fast-rate task processing loop further comprises:

overwriting the intermediate value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

intermediate</sub>) held in the second page of the double-buffer with the final steady-state value that has been stored in the temporary variable.

8. A method according to claim 1, wherein the relatively slow-rate is less than the intermediate-rate, wherein the intermediate-rate is less than the relatively fast-rate.

9. A method according to claim 8, wherein fast-rate task processing is non-interruptible by the intermediate-rate task processing and the slow-rate task processing, and wherein intermediate-rate task processing is non-interruptible by the slow-rate task processing and is interruptible by the fast-rate task processing, wherein the slow-rate task processing is interruptible by the fast-rate task processing and the intermediate-rate task processing.

10. A system, comprising:

a processor configured to execute;

a slow-rate task processor module that is configured to iteratively execute slow-rate task processing during a slow-rate task processing loop that executes at a relatively slow-rate during a first task processing period (T_TASK2);

an intermediate-rate task processor module that is configured to iteratively execute intermediate-rate task processing during an intermediate-rate task processing loop that executes at an intermediate-rate during a second task processing period (T_TASk1), wherein the intermediate-rate task processor module, comprises;

a first computation module that is configured to compute a new instantaneous switching frequency (f<sub>SW—

new</sub>), and to compute tri-state values for a PWM voltage advance delay time, wherein the tri-state values for the PWM voltage advance delay time comprise;

an initial steady-state value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

initial—

ss</sub>);

an intermediate value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

intermediate</sub>); and

a final steady-state value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

final—

ss</sub>); and

a fast-rate task processor module that is configured to iteratively execute fast-rate task processing during a fast-rate task processing loop that executes at a relatively fast-rate during a third task processing period (T_Task0), wherein the fast-rate task processing loop is configured to compute tri-state values for a PWM voltage advance angle (Δ

θ

) that are used during a transition state when a current actual switching frequency (f_SW) changes to the new instantaneous switching frequency (f<sub>SW—

new</sub>), wherein the tri-state values for the PWM voltage advance angle (Δ

θ

) are computed based on;

a product of the initial steady-state value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

initial—

ss</sub>) and an angular rotor velocity (ω

_r);

a product of the intermediate value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

intermediate</sub>) delay time and the angular rotor velocity (ω

_r); and

a product of the final steady-state value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

final—

ss</sub>) delay time and the angular rotor velocity (ω

_r).

11. A system according to claim 10, wherein the slow-rate task processor module further comprises:

a second computation module that computes, once during each first task processing period (T_TASK2), an average switching frequency (f<sub>SW—

avg</sub>) and a dither span frequency (f_span) that corresponds to an amount of frequency variation allowed when dithering switching frequency (f_SW).

12. A system according to claim 11, wherein the computation module is configured to compute, at the intermediate-rate (T_TASK1) during execution of intermediate-rate task processing loop:

a pseudo-random number (K_rand), and

the new instantaneous switching frequency (f<sub>SW—

new</sub>) based on the average switching frequency (f<sub>SW—

avg</sub>), the dither span frequency (f_span) and a scaled version of the pseudo-random number (K_rand); and

further comprising;

a parameter re-initialization module that regularly and consecutively re-initializes time-dependent parameter values that will be used by the fast-rate task processor, based on the new instantaneous switching frequency (f<sub>SW—

new</sub>).

13. A system according to claim 10, further comprising:

a double-buffer for storing the tri-state values for the PWM voltage advance delay time, wherein contents of the double-buffer are updated twice per switching frequency (f_SW) transition.

14. A system according to claim 13, wherein the double-buffer comprises a first page and a second page, and wherein the intermediate-rate task processor module, further comprises:

a PWM voltage advance computation module that is configured to;

compute the initial steady-state value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

initial—

ss</sub>) during the intermediate-rate task processing loop while operating with an initial switching period (T<sub>SW—

initial</sub>), wherein the initial value steady-state value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

initial—

ss</sub>) is stored at the first page prior to execution of a pre-fast-rate task processing loop.

15. A system according to claim 14, wherein the PWM voltage advance computation module is configured to compute the intermediate value for the PWM voltage advance delay time (t_PWM—

<sub>Adv—

intermediate</sub>) based on the initial switching period (T<sub>SW—

initial</sub>) and a next switching period (T<sub>SW—

next</sub>),

wherein the intermediate value is computed during a switching frequency (f_SW) transition state that occurs during execution of intermediate-rate task processing loop,

wherein the intermediate value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

intermediate</sub>) is then stored at the second page for use by a motor control modules to transform a synchronous frame voltage command back to a stationary frame when a first index is toggled during execution of a pre-fast-rate task processing loop.

16. A system according to claim 15, wherein the PWM voltage advance computation module is configured to compute the final steady-state value for the PWM voltage advance delay time (t_PWM—

<sub>Adv—

final—

ss</sub>) during the second task processing period based on the next switching period (T<sub>SW—

next</sub>),

wherein the final steady-state value is temporarily stored in a temporary variable, and wherein the fast-rate task processor module, further comprises;

a PWM voltage advance update module that is configured to overwrite the intermediate value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

intermediate</sub>) held in the second page of the double-buffer with the final steady-state value that has been stored in the temporary variable.

17. A system according to claim 10, wherein fast-rate task processing is non-interruptible by the intermediate-rate task processing and the slow-rate task processing, and wherein intermediate-rate task processing is non-interruptible by the slow-rate task processing and is interruptible by the fast-rate task processing, wherein the slow-rate task processing is interruptible by the fast-rate task processing and the intermediate-rate task processing, and wherein the relatively slow-rate is less than the intermediate-rate, wherein the intermediate-rate is less than the relatively fast-rate.

18. A system, comprising:

a processor configured to execute;

a computation module that is configured to compute a new instantaneous switching frequency (f<sub>SW—

new</sub>) and to compute tri-state values for a PWM voltage advance delay time, wherein the tri-state values for the PWM voltage advance delay time comprise;

an initial steady-state value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

inital—

ss</sub>), an intermediate value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

intermediate</sub>); and

a final steady-state value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

final—

ss</sub>), and

a fast-rate task processor module that is configured to compute tri-state values for a PWM voltage advance angle (Δ

θ

) that are used during a transition state when a current actual switching frequency (f_SW) changes to the new instantaneous switching frequency (f<sub>SW—

new</sub>), wherein the tri-state values for the PWM voltage advance angle (Δ

θ

) are computed based on;

a product of the initial steady-state value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

inital—

ss</sub>) and an angular rotor velocity (ω

_r);

a product of the intermediate value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

intermediate</sub>) delay time and the angular rotor velocity (ω

_r); and

a product of the final steady-state value for the PWM voltage advance delay time (t<sub>PWM—

Adv—

final—

ss</sub>) delay time and the angular rotor velocity (ω

_r).