Runtime code modification in a multi-threaded environment

• US 8,584,111 B2
• Filed: 08/21/2007
• Issued: 11/12/2013
• Est. Priority Date: 08/28/2006
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Stoodley, Kevin Alexander, Stoodley, Mark Graham
• Primary Examiner(s): Zhen, Wei
• Assistant Examiner(s): BANES, ADAM RICHARD
• Application Number:
  US11/842,260
• Publication Number:
  US 20080052498A1
• Time in Patent Office: 2,275 Days
• Field of Search: None
• US Class Current: 717/159
• CPC Class Codes: G06F 9/3851 from multiple instruction streams, e.g. multistreaming

Abstract

A code region forming part of a computer program is modified during execution of the computer program by a plurality of threads. In one aspect, identical modification instructions are provided to each thread for modifying a site in the code region having a desirable idempotent atomic modification, and the modification instructions direct each thread to make the desirable idempotent atomic modification. In another aspect, a thread is selected to modify the code region, each thread other than the selected thread is directed to execute an alternative execution path that generates output identical to the output of the code region after the code region has been modified, and, responsive to directing each thread other than the selected thread, the selected thread is directed to modify the code region.

Claims

1. A data processing system comprising:

at least one processor;

a bus coupled to the at least one processor; and

at least one computer usable storage medium coupled to the bus, wherein the at least one computer usable storage medium contains a set of instructions for making a desirable modification, without use of a self-loop, to a site in a code region forming part of a computer program during execution of the computer program by a plurality of threads, wherein the at least one processor is adapted to carry out the set of instructions by causing the data processing system to provide identical modification instructions to each thread for modifying the site in the code region, wherein the modification instructions direct each thread to make the desirable modification using an idempotent atomic instruction and wherein the idempotent atomic instruction is generated to ensure that the desirable modification does not cross a patching boundary by NOP insertion.

2. The data processing system of claim 1, wherein the modification instructions are adapted so that, responsive to completion of the desirable modification, the identical modification instructions are negated.

3. A data processing system comprising:

at least one processor;

a bus coupled to the at least one processor; and

at least one computer usable storage medium coupled to the bus, wherein the at least one computer usable storage medium contains a set of instructions for modifying, without use of a self-loop, a code region forming part of a computer program during execution of the computer program by a plurality of threads, wherein the at least one processor is adapted to carry out the set of instructions by causing the data processing system to;

select a thread to modify the code region;

direct each thread other than the selected thread to follow an alternative execution path that generates output identical to output of the code region after the desirable modification has been made to the code region;

responsive to directing each thread other than the selected thread, direct the selected thread to make the desirable modification to the code region so as to generate a modified code region; and

responsive to completion of the desirable modification by the selected thread, direct each thread to execute the modified code region.

4. The data processing system of claim 3, wherein the at least one processor is further adapted to carry out the set of instructions by causing the data processing system to, prior to directing each thread other than the selected thread to follow the alternative execution path, generate the alternative execution path.

5. The data processing system of claim 3, wherein the alternative execution path is a pre-existing general call associated with the code region.

6. The data processing system of claim 3, wherein the thread selected to modify the code region comprises an arbitrary first thread to reach a particular execution point associated with the code region.

7. A data processing system comprising:

at least one processor;

a bus coupled to the at least one processor; and

at least one computer usable storage medium coupled to the bus, wherein the at least one computer usable storage medium contains a set of instructions for causing a desirable modification to be made, without use of a self-loop, to a site in a code region forming part of a computer program during execution of the computer program by a plurality of threads, wherein the at least one processor is adapted to carry out the set of instructions by causing the data processing system to;

generate, as executable code in the code region, a call to a set of modification instructions, the modification instructions using an idempotent atomic instruction to make the desirable modification, so that each thread reaching the call will execute the idempotent atomic instruction, wherein the idempotent atomic instruction is generated to ensure that the desirable modification does not cross a patching boundary by NOP insertion.

8. The data processing system of claim 7, wherein the idempotent atomic instruction comprises a compare-and-swap instruction that executes successfully only on a first execution thereof, the first execution performing the desirable modification.

9. The data processing system of claim 7, wherein the modification instructions are adapted to negate the call responsive to completion of the desirable modification.

10. A data processing system comprising:

at least one processor;

a bus coupled to the at least one processor; and

at least one computer usable storage medium coupled to the bus, wherein the at least one computer usable storage medium contains executable code for causing modification, without use of a self-loop, of a code region forming part of a computer program during execution of the computer program by a plurality of threads, wherein the at least one processor is adapted to carry out the executable code by causing the data processing system to;

generate, as executable code in the code region, a call to a set of instructions that causes the desirable modification to be made; and

generate, as the set of instructions, executable code that, when executed, performs;

causing an arbitrary thread that executes the set of instructions to become a selected thread;

directing each thread other than the selected thread to follow an alternative execution path that generates output identical to output of the code region after the desirable modification has been made to the code region;

responsive to directing each thread other than the selected thread, directing the selected thread to make the desirable modification to the code region so as to generate a modified code region; and

directing each thread to execute the modified code region in response to completion of the desirable modification by the selected thread.

11. The data processing system of claim 10, wherein the executable code generated as the set of instructions, when executed, further performs generating the alternative execution path before each thread other than the selected thread is directed to follow the alternative execution path.

12. The data processing system of claim 10, wherein the alternative execution path is a pre-existing general call associated with the code region.

13. The data processing system of claim 10, wherein the arbitrary thread is a first thread to reach the call.