Integrated compact MEMS device with deep trench contacts

• US 8,587,077 B2
• Filed: 01/02/2012
• Issued: 11/19/2013
• Est. Priority Date: 01/02/2012
• Status: Expired due to Fees

• Current Assignee: Windtop Technology Corp.
• Original Assignee: Windtop Technology Corp.
• Inventors: Chen, Kun-Lung
• Primary Examiner(s): YUSHIN, NIKOLAY K
• Application Number:
  US13/342,129
• Publication Number:
  US 20130168740A1
• Time in Patent Office: 687 Days
• Field of Search: 257/415, 257/416, 257/417, 257/418, 257/254
• US Class Current: 257/416
• CPC Class Codes: B81B 2201/0235 Accelerometers
• CPC Class Codes: B81B 2207/012 the micromechanical device and the control or processing electronics being separate parts in the same package
• CPC Class Codes: B81C 1/00238 Joining a substrate with an electronic processing unit and a substrate with a micromechanical structure
• CPC Class Codes: B81C 2203/0792 Forming interconnections between the electronic processing unit and the micromechanical structure
• CPC Class Codes: G01C 19/5783 Mountings or housings not specific to any of the devices covered by groups G01C19/5607 - G01C19/5719
• CPC Class Codes: G01P 1/02 Housings
• CPC Class Codes: H01L 2224/03 Manufacturing methods
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/05552 in top view
• CPC Class Codes: H01L 2224/05568 the whole external layer protruding from the surface
• CPC Class Codes: H01L 2224/05572 the external layer extending out of an opening
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05647 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/05655 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/11 Manufacturing methods
• CPC Class Codes: H01L 2224/131 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 2224/13111 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/29011 comprising apertures or cavities
• CPC Class Codes: H01L 2224/29124 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/32145 : the bodies being stacked
• CPC Class Codes: H01L 2224/45099 : Material
• CPC Class Codes: H01L 2224/48091 : Arched
• CPC Class Codes: H01L 2224/48137 : the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/48145 : the bodies being stacked
• CPC Class Codes: H01L 2224/73253 : Bump and layer connectors
• CPC Class Codes: H01L 2224/73265 : Layer and wire connectors
• CPC Class Codes: H01L 2224/83 : using a layer connector
• CPC Class Codes: H01L 2224/83005 : being a temporary or sacrificial substrate
• CPC Class Codes: H01L 2224/92225 : the second connecting process involving a layer connector
• CPC Class Codes: H01L 2224/94 : at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
• CPC Class Codes: H01L 24/05 : of an individual bonding area
• CPC Class Codes: H01L 24/29 : of an individual layer connector
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 24/92 : Specific sequence of method steps
• CPC Class Codes: H01L 24/94 : at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/1461 : MEMS
• CPC Class Codes: H01L 2924/16235 : Connecting to a semiconductor or solid-state bodies, i.e. cap-to-chip
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding

Abstract

A compact MEMS motion sensor device is provided, including a CMOS substrate layer, with plural anchor posts having an isolation oxide layer surrounding a conductive layer. On one side of the CMOS substrate layer, the device further includes a field oxide (FOX) layer, a first set and a second set of implant doped silicon areas, a first polysilicon layer, an oxide layer embedded with plural metal layers interleaved with via hole layers, a Nitride deposition layer, an under bump metal (UBM) layer and a plurality of solder spheres. On the other side of the CMOS substrate layer, it further includes a backside interconnect isolation oxide layer, a first MEMS bonding layer, a first metal compound layer, a second MEMS bonding layer, a MEMS layer, a first MEMS eutectic bonding layer, a second metal compound layer, a second MEMS eutectic bonding layer, and a MEMS cap layer.

Claims

1. A compact MEMS motion sensor device, applicable to both flip chip and wire bonding technologies, said device comprising:

a CMOS substrate layer;

a plurality of anchor posts, embedded inside and penetrating through said CMOS substrate layer, each anchor post of said plurality of anchor posts having an isolation oxide layer surrounding a conductive layer;

a CMOS ASIC device module, fabricated on a top side of said CMOS substrate layer, further comprising;

a field oxide (FOX) layer;

a first set of implant doped silicon areas forming CMOS wells;

a second set of implant doped silicon areas forming CMOS sources/drains;

a first polysilicon layer forming CMOS transistor gates, said CMOS wells, said CMOS sources/drains and said CMOS transistor gates forming CMOS transistors;

an oxide layer embedded with a plurality of metal layers interleaved with a plurality of via hole layers, a first via hole layer of said plurality of via hole layers acting as CMOS contacts and remaining via hole layers acting as CMOS vias, said plurality of metals layers and said plurality of via hole layers forming a scribe seal;

a Nitride deposition layer;

an under bump metal (UBM) layer; and

a plurality of solder spheres, said UBM layer and said plurality of solder spheres forming a flip chip bump layer; and

a MEMS device module, attached on a backside of said CMOS substrate layer, further comprising;

a backside interconnect isolation oxide layer, for isolating said MEMS device module from said CMOS substrate layer;

a first MEMS bonding layer;

a second MEMS bonding layer;

a first metal compound layer, located between said first MEMS bonding layer and said second MEMS bonding layer;

a MEMS layer, having a plurality of via holes for forming MEMS motion fingers;

a first MEMS eutectic bonding layer;

a second MEMS eutectic bonding layer;

a second metal compound layer, located between said first MEMS eutectic bonding layer and said second MEMS eutectic bonding layer; and

a MEMS cap layer;

wherein a plurality of cavities exists between said backside interconnect isolation oxide layer and said second MEMS bonding layer, and a gap exists between said MEMS layer and said MEMS cap layer, said plurality of via holes in said MEMS layer connecting said plurality of cavities and said gap, and said plurality of anchor posts serving as signal interconnects and anchors for said MEMS device module and said CMOS ASIC device module.

2. The compact MEMS motion sensor device as claimed in claim 1, wherein said MEMS device module is bonded to a backside of a CMOS wafer comprising said CMOS ASIC device module.

3. The compact MEMS motion sensor device as claimed in claim 1, wherein said MEMS cap layer is bonded to said MEMS layer.

4. The compact MEMS motion sensor device as claimed in claim 1, wherein said plurality of anchor posts are polysilicon trenches for avoiding disturbance to CMOS device characteristics of said CMOS ASIC device module.

5. The compact MEMS motion sensor device as claimed in claim 2, wherein a MEMS wafer comprising said MEMS device module and having a desired thickness is bonded onto said CMOS substrate layer where interconnects are made.

6. The compact MEMS motion sensor device as claimed in claim 5, wherein said MEMS cap layer is bonded at a backside of said MEMS wafer with bonding areas coinciding with bonding areas of said MEMS wafer and said CMOS wafer for area savings.

7. The compact MEMS motion sensor device as claimed in claim 1, wherein said MEMS cap layer does not comprise any hole opening when using with flip chip technology.

8. The compact MEMS motion sensor device as claimed in claim 1, wherein die saw area for cutting wafer into individual dies is the same as CMOS ASIC module scribe line area.

9. The compact MEMS motion sensor device as claimed in claim 1, wherein said plurality of cavities formed between said CMOS substrate layer and said MEMS layer is formed by etching said CMOS substrate layer, and said plurality of cavities forms a Z-axis capacitor.

10. The compact MEMS motion sensor device as claimed in claim 1, wherein capacitance forms between said MEMS motion fingers, and when motion occurs, said capacitance changes and differential capacitance caused by motion is detected by said CMOS ASIC device module.

11. The compact MEMS motion sensor device as claimed in claim 5, wherein a thin Germanium film on said MEMS wafer serves as an endpoint detection to signal an end of etching on said MEMS wafer during an etch process.

12. The compact MEMS motion sensor device as claimed in claim 1, wherein ground capacitors are formed by using said conductive layer in each anchor post as a top capacitor electrode and said CMOS substrate layer as a ground electrode.

13. The compact MEMS motion sensor device as claimed in claim 4, wherein trench capacitors are formed by angled N+ ion implant into sidewalls of said polysilicon trenches of said plurality of anchor posts to form isolated capacitor plates.

14. The compact MEMS motion sensor device as claimed in claim 13, wherein said isolation oxide layer at bottom of said trench capacitors isolates said MEMS device module.

15. The compact MEMS motion sensor device as claimed in claim 14, wherein large capacitance is formed with a plurality of said trench capacitors connected in parallel.

16. The compact MEMS motion sensor device as claimed in claim 15, wherein said trench capacitors are formed as a high efficiency capacitor for said CMOS ASIC device module.

17. The compact MEMS motion sensor device as claimed in claim 16, wherein said trench capacitors are made by using a highly capacitive and reliable Oxide-Nitride-Oxide (ONO) dielectric.

18. The compact MEMS motion sensor device as claimed in claim 1, wherein a vertical coaxial cable is formed by fabricating a polysilicon trench acting as a shielding ring surrounding a central polysilicon trench acting as a main signal connection.

19. The compact MEMS motion sensor device as claimed in claim 18, wherein said vertical coaxial cable reduces stray capacitance of a signal connection line.