System and method for providing an active current assist with analog bypass for a switcher circuit

• US 8,587,268 B1
• Filed: 06/18/2008
• Issued: 11/19/2013
• Est. Priority Date: 06/18/2008
• Status: Active Grant

• Current Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Original Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Inventors: Huard, Jeffry Mark
• Primary Examiner(s): Berhane, Adolf
• Assistant Examiner(s): Quddus, Nusrat
• Application Number:
  US12/214,280
• Time in Patent Office: 1,980 Days
• Field of Search: 323/268, 323271-284
• US Class Current: 323/268
• CPC Class Codes: H02M 3/1566 with means for compensating against rapid load changes, e.g. with auxiliary current source, with dual mode control or with inductance variation
• CPC Class Codes: H02M 3/158 including plural semiconductor devices as final control devices for a single load

Abstract

A system and method are disclosed for providing an active current assist with analog bypass for a switcher circuit. An active current assist circuit is coupled to a buck regulator circuit, which includes a switcher circuit, an inductor circuit and a capacitor circuit. The active current assist circuit includes an active current analog bypass control circuit and a current source. The active current analog bypass control circuit receives and uses current limit information, voltage error information, and drop out information to determine a value of assist current that is appropriate for a current operational state of the buck regulator circuit. The active current analog bypass control circuit causes the current source to provide the appropriate value of assist current to the buck regulator circuit.

Claims

1. A buck regulator circuit for providing buck regulation to supply a regulated load current to a load, the buck regulator circuit operable with a buck inductor coupled to the buck regulator at a switch node and to the load at an output node, the buck regulator circuit comprising:

a switcher circuit operable to provide buck regulation and supply an inductor current through the buck inductor to the load; and

an analog bypass (ACB) circuit including;

an ACB current source coupled to the output node and in parallel with the buck inductor, and configured to supply, in response to an ACB control signal, an ACB current to the load; and

an ACB control circuit configured to provide the ACB control signal;

wherein the switcher circuit and the buck inductor are characterized by a switcher/inductor drop out resistance, and the ACB current source is characterized by an ACB resistance, such that a regulator drop out resistance at the output node corresponds to the switcher/inductor drop out resistance in parallel with the ACB resistance, which is less than the switcher/inductor drop out resistance; and

wherein the ACB control circuit includes;

a current comparator circuit configured to receive inductor current information from the switcher circuit, and to provide an inductor current signal representative of the inductor current relative to a predetermined current limit of the inductor; and

a drop out detector circuit configured to receive drop out information from the switcher circuit, and to provide a drop out signal representative of buck regulation operation of the switcher circuit relative to a predetermined drop out condition in which the switcher substantially ceases regulation;

wherein the ACB control circuit is operable to provide the ACB control signal based on the inductor current signal and the drop out signal.

2. The buck regulator circuit as set forth in claim 1:

wherein the ACB current source comprises series coupled pull-up and pull-down digital to analog converters (DACs) responsive to polarity select signals to selectively enable either the pull-up DAC to source the ACB current to the output node, or the pull-down DAC to sink the ACB current from the output node; and

wherein the ACB control circuit includes;

a combination logic and state machine coupled to the current comparator circuit and the drop out detector circuit, the combination logic and state machine configured to provide, in response to the inductor current signal and the drop out signal, (i) a variable multi-bit control value, and (ii) the polarity select signals; and

a DAC count circuit configured to provide, in response to the variable multi-bit count value, the ACB control signal to control the pull-up and pull-down DACs.

3. The buck regulator circuit as set forth in claim 1:

further comprising an output capacitor coupled to the output node in parallel with the load;

wherein the ACB current source comprises a positive ACB current source to source the ACB current and a negative ACB current source to sink the ACB current; and

wherein the ACB control circuit is operable to control the ACB current to charge and discharge the output capacitor.

4. The buck regulator circuit as set forth in claim 1, wherein the current comparator circuit is operable to compare the inductor current information from the switcher circuit to a current limit reference representative of inductor saturation.

5. The buck regulator circuit as set forth in claim 1, wherein the drop out detector comprises at least one of

a pulse skip detector circuit configured to receive pulse skip information from the switcher circuit corresponding to a predetermined pulse skip condition;

and

a voltage error comparator circuit configured to receive output voltage information from the switcher circuit corresponding to a predetermined buck regulation condition.

6. The buck regulator circuit as set forth in claim 5, wherein the output voltage information from the switcher circuit comprises a feedback voltage that is a representation of an output voltage at the output node that is fed back to the switcher circuit for buck regulation.

7. The buck regulator circuit as set forth in claim 5, wherein the pulse skip information from the switcher circuit is derived from a pulse width modulated signal output by the switcher circuit at the switch node.

8. The buck regulator circuit as set forth in claim 7, wherein the pulse skip information corresponds to a number of pulses skipped by the switcher circuit.

9. The buck regulator circuit as set forth in claim 1, wherein the ACB control circuit is operable to supply, in response to at least the inductor current signal, ACB current to the output node such that the dynamic range of the buck regulator is greater that the dynamic range of the switcher circuit.

10. The buck regulator circuit as set forth in claim 1, wherein the ACB control circuit is operable to provide the ACB control signal to control both the amount and the rate of change of the ACB current supplied to the load.

11. The buck regulator circuit as set forth in claim 10, wherein the ACB control circuit is operable to provide the ACB control signal with a dead band in which the ACB current does not change in response to inductor current signal and the drop out signal.

12. A buck regulator circuit for providing buck regulation to supply a regulated load current to a load, the buck regulator circuit operable with a buck inductor coupled to the buck regulator at a switch node and to the load at an output node, the buck regulator circuit comprising:

a switcher circuit operable to provide buck regulation and supply an inductor current through the buck inductor to the load; and

an analog bypass (ACB) circuit including;

an ACB current source coupled to the output node and in parallel with the buck inductor, and configured to supply, in response to an ACB control signal, an ACB current to the load;

wherein the ACB current source includes series coupled pull-up and pull-down digital to analog converters (DACs) responsive to polarity select signals to selectively enable either the pull-up DAC to source the ACB current to the output node, or the pull-down DAC to sink the ACB current from the output node; and

an ACB control circuit configured to provide the ACB control signal;

wherein the switcher circuit and the buck inductor are characterized by a switcher/inductor drop out resistance, and the ACB current source is characterized by an ACB resistance, such that a regulator drop out resistance at the output node corresponds to the switcher/inductor drop out resistance in parallel with the ACB resistance, which is less than the switcher/inductor drop out resistance; and

wherein the ACB control circuit includes;

a current comparator circuit configured to receive inductor current information from the switcher circuit, and to provide an inductor current signal representative of the inductor current relative to a predetermined current limit of the inductor;

a drop out detector circuit configured to receive drop out information from the switcher circuit, and to provide a drop out signal representative of buck regulation operation of the switcher circuit relative to a predetermined drop out condition in which the switcher substantially ceases regulation;

a combination logic and state machine configured to provide, in response to the inductor current signal and the drop out signal, (i) a variable multi-bit control value, and (ii) the polarity select signals; and

a DAC count circuit configured to provide, in response to the variable multi-bit count value, the ACB control signal to control the pull-up and pull-down DACs.

13. The buck regulator circuit as set forth in claim 12:

further comprising an output capacitor coupled to the output node in parallel with the load;

wherein the ACB control circuit is operable to control the ACB current to charge and discharge the output capacitor.

14. The buck regulator circuit as set forth in claim 12, wherein the current comparator circuit is operable to compare the inductor current information from the switcher circuit to a current limit reference representative of inductor saturation.

15. The buck regulator circuit as set forth in claim 12, wherein the drop out detector comprises at least one of:

a pulse skip detector circuit configured to receive pulse skip information from the switcher circuit corresponding to a predetermined pulse skip condition; and

a voltage error comparator circuit configured to receive output voltage information from the switcher circuit corresponding to a predetermined buck regulation condition.

16. The buck regulator circuit as set forth in claim 15, wherein the output voltage information from the switcher circuit comprises a feedback voltage representative of an output voltage at the output node that is fed back to the switcher circuit for buck regulation.

17. The buck regulator circuit as set forth in claim 15, wherein the pulse skip information from the switcher circuit is derived from a pulse width modulated signal output by the switcher circuit at the switch node.

18. The buck regulator circuit as set forth in claim 17, wherein the pulse skip information corresponds to a number of pulses skipped by the switcher circuit.

19. The buck regulator circuit as set forth in claim 12, wherein the ACB control circuit is operable to supply, in response to at least the inductor current signal, ACB current to the output node such that the dynamic range of the buck regulator is greater that the dynamic range of the switcher circuit.

20. The buck regulator circuit as set forth in claim 12, wherein the ACB control circuit is operable to provide the ACB control signal to control both the amount and the rate of change of the ACB current supplied to the load.

21. The buck regulator circuit as set forth in claim 20, wherein the ACB control circuit is operable to provide the ACB control signal with a dead band in which the ACB current does not change.

22. A method of buck regulation to supply a regulated load current to a load through a buck inductor that is coupled to a buck regulator at a switch node and to the load at an output node, the method of buck regulation comprising:

operating the buck regulator to supply an inductor current through the buck inductor to the load; and

controlling an ACB current source coupled to the output node in parallel with the buck inductor to supply at the output node an ACB current to the load;

wherein the buck regulator and the buck inductor are characterized by a switcher/inductor drop out resistance, and the ACB current source is characterized by an ACB resistance, such that a regulator drop out resistance at the output node corresponds to the switcher/inductor drop out resistance in parallel with the ACB resistance, which is less than the switcher/inductor drop out resistance; and

providing an ACB control signal to control the ACB current source by;

providing, in response to inductor current information, an inductor current signal representative of the inductor current relative to a predetermined current limit of the inductor; and

providing, in response to drop out information, a drop out signal representative of buck regulation relative to a predetermined drop out condition in which buck regulation substantially ceases;

providing the ACB control signal based on the inductor current signal and the drop out signal.

23. The method of claim 22, wherein an output capacitor is coupled to the output node in parallel with the load, and wherein the ACB current is controlled to charge and discharge the output capacitor.

24. The method of claim 22, wherein the inductor current information comprises a current limit reference representative of inductor saturation.

25. The method of claim 22, wherein the drop out information comprises at least one of:

pulse skip information corresponding to a predetermined pulse skip condition; and

output voltage information corresponding to a predetermined buck regulation condition.

26. The method of claim 22, wherein the ACB current is supplied to the output node such that the dynamic range for the regulated load current is greater that the dynamic range of the buck regulator.

27. The method of claim 22, wherein the ACB control signal controls both the amount and the rate of change of the ACB current supplied to the load.

28. The method of claim 27, wherein the ACB control signal includes a dead band in which the ACB current does not change.