Methods and apparatus to secure communications in a mobile network

• US 8,588,426 B2
• Filed: 02/21/2011
• Issued: 11/19/2013
• Est. Priority Date: 02/21/2011
• Status: Active Grant

• Current Assignee: Malikie Innovations Limited (Key Patent Innovations Limited)
• Original Assignee: Blackberry Limited
• Inventors: Xin, Yan, Qu, Shouxing
• Primary Examiner(s): Orgad, Edan
• Assistant Examiner(s): SCHMIDT, KARI L
• Application Number:
  US13/031,561
• Publication Number:
  US 20120213373A1
• Time in Patent Office: 1,002 Days
• Field of Search: 380/252, 380/268, 380/272, 380/278, 380/287, 714/784, 714/780, 714/805, 714/758, 714/807, 714/762
• US Class Current: 380/287
• CPC Class Codes: H04L 2209/08 Randomization, e.g. dummy operations or using noise
• CPC Class Codes: H04L 63/1466 Active attacks involving interception, injection, modification, spoofing of data unit addresses, e.g. hijacking, packet injection or TCP sequence number attacks
• CPC Class Codes: H04L 9/002 Countermeasures against attacks on cryptographic mechanisms network architectures or network communication protocols for protection against malicious traffic H04L63/1441
• CPC Class Codes: H04W 12/037 of the control plane, e.g. signalling traffic
• CPC Class Codes: H04W 12/12 Detection or prevention of fraud

Abstract

Methods and apparatus to secure communications in a mobile network are disclosed. An example method disclosed herein comprises randomizing a first set of bits associated with information to be communicated over a slow associated control channel by applying a scrambling factor to generate a set of scrambled bits equal in length to the first set of bits. Another example method disclosed herein comprises concatenating a set of error detection bits with a set of information bits associated with information to be transmitted over a slow associated control channel to generate a set of coded bits, and shuffling the set of coded bits to generate a set of shuffled bits.

Claims

1. A method comprising:

prior to applying encoding that is to generate a set of error detection bits for information to be communicated over a slow associated control channel, randomizing, by a processor, a first set of bits associated with the information to be communicated over the slow associated control channel by applying a scrambling factor to generate a set of scrambled bits equal in length to the first set of bits, wherein the scrambling factor comprises a scrambling polynomial, and the scrambling factor is applied by performing binary sequence division to divide the first set of bits by the scrambling polynomial; and

applying, by the processor, the encoding to the set of scrambled bits to generate the set of error detection bits.

2. A method as defined in claim 1 wherein a degree of the scrambling polynomial is at least sixteen.

3. A method as defined in claim 1 wherein the scrambling factor is a primitive.

4. A method as defined in claim 1 wherein the scrambling factor is fixed.

5. A method as defined in claim 1 wherein the first set of bits includes a set of information bits concatenated with a set of augmenting bits.

6. A method as defined in claim 5 further comprising performing encoding with puncturing after randomizing the first set of bits.

7. A method as defined in claim 1 wherein the set of scrambled bits comprises a first subset of scrambled bits and a second subset of scrambled bits.

8. A method as defined in claim 7 wherein the first subset of scrambled bits corresponds to a layer-1 header and the second subset of scrambled bits corresponds to higher layer information.

9. A method as defined in claim 7 further comprising concatenating the set of error detection bits with the set of scrambled bits to generate a set of coded bits.

10. A method comprising

randomizing, by a processor, a first set of bits associated with information to be communicated over a slow associated control channel by applying a scrambling factor to generate a set of scrambled bits equal in length to the first set of bits, wherein the scrambling factor is determined based on a frame number and a ciphering key.

11. A method comprising:

randomizing, by a processor, a first set of bits associated with information to be communicated over a slow associated control channel by applying a scrambling factor to generate a set of scrambled bits equal in length to the first set of bits, wherein the set of scrambled bits comprises a first subset of scrambled bits and a second subset of scrambled bits;

concatenating, by the processor, a set of error detection bits with the set of scrambled bits to generate a set of coded bits; and

shuffling, by the processor, the set of coded bits to generate a set of shuffled bits, wherein a length of each group of consecutive bits from the second subset of scrambled bits in the generated set of shuffled bits is less than a predetermined number.

12. A method as defined in claim 11 wherein the predetermined number is five.

13. A method as defined in claim 11 wherein the set of coded bits is a first set of coded bits, and further comprising performing forward error correction coding on the set of shuffled bits to generate a second set of coded bits.

14. A method as defined in claim 13 wherein performing forward error correction coding comprises performing convolutional coding.

15. A method comprising;

randomizing, by a processor, a first set of bits associated with information to be communicated over a slow associated control channel by applying a scrambling factor to generate a set of scrambled bits equal in length to the first set of bits, wherein the set of scrambled bits comprises a first subset of scrambled bits and a second subset of scrambled bits;

concatenating, by the processor, a set of error detection bits with the set of scrambled bits to generate a set of coded bits; and

shuffling, by the processor, the set of coded bits to generate a set of shuffled bits, wherein shuffling the set of coded bits comprises;

generating a first subset of shuffled bits and a second subset of shuffled bits, wherein

the first subset of shuffled bits comprises groups of three bits that include two bits from the first subset of scrambled bits and one bit from the second subset of scrambled bits, and

the second subset of shuffled bits comprises groups of five bits that include four bits from the second subset of scrambled bits and one bit from the set of error detection bits.

16. A tangible machine readable medium comprising machine readable instructions which, when executed, cause a machine to at least:

prior to application of encoding that is to generate error detection bits for information to be communicated over a slow associated control channel, randomize a first set of bits associated with the information to be communicated over the slow associated control channel by applying a scrambling factor to generate a set of scrambled bits equal in length to the first set of bits, wherein the scrambling factor comprises a scrambling polynomial, and the scrambling factor is applied by performing binary sequence division to divide the first set of bits by the scrambling polynomial; and

apply the encoding to the set of scrambled bits to generate the error detection bits.

17. A method comprising:

concatenating, by a processor, a set of error detection bits with a set of information bits associated with information to be transmitted over a slow associated control channel to generate a set of coded bits; and

shuffling, by the processor, the set of coded bits to generate a set of shuffled bits, wherein the set of information bits comprises a first subset of information bits and a second subset of information bits, and wherein a length of each group of consecutive bits from the second subset of information bits in the generated set of shuffled bits is less than a predetermined number.

18. A method as defined in claim 17 wherein the predetermined number is five.

19. A method as defined in claim 17 wherein the set of coded bits is a first set of coded bits, and further comprising performing forward error correction coding on the set of shuffled bits to generate a second set of coded bits.

20. A method as defined in claim 19 wherein performing forward error correction coding comprises performing convolutional coding.

21. A method comprising:

concatenating, by a processor, a set of error detection bits with a set of information bits associated with information to be transmitted over a slow associated control channel to generate a set of coded bits; and

shuffling, by the processor, the set of coded bits to generate a set of shuffled bits, wherein the set of information bits comprises a first subset of information bits and a second subset of information bits, and wherein shuffling the set of coded bits comprises;

generating a first subset of shuffled bits and a second subset of shuffled, wherein

the first subset of shuffled bits comprises groups of three bits that include two bits from the first subset of information bits and one bit from the second subset of information bits, and

the second subset of shuffled bits comprises groups of five bits that include four bits from the second subset of information bits and one bit from the set of error detection bits.

22. A tangible machine readable medium storing machine readable instructions which, when executed, cause a machine to at:

concatenate a set of error detection bits with a set of information bits associated with information to be transmitted over a slow associated control channel to generate a set of coded bits; and

shuffle the set of coded bits to generate a set of shuffled bits, wherein the set of information bits comprises a first subset of information bits and a second subset of information bits, and wherein a length of each group of consecutive bits from the second subset of information bits in the generated set of shuffled bits is less than a predetermined number.