Arbitration system and method for memory responses in a hub-based memory system

• US 8,589,643 B2
• Filed: 12/22/2005
• Issued: 11/19/2013
• Est. Priority Date: 10/20/2003
• Status: Expired due to Fees

• Current Assignee: Round Rock Research LLC
• Original Assignee: Round Rock Research LLC
• Inventors: Meyer, James W., Kanski, Cory
• Primary Examiner(s): THAI, TUAN V
• Application Number:
  US11/318,356
• Publication Number:
  US 20060136683A1
• Time in Patent Office: 2,889 Days
• Field of Search: 711/100, 711/118, 711/154, 711/158
• US Class Current: 711/158
• CPC Class Codes: G06F 13/1605 based on arbitration arbitration in handling access to a common bus or bus system G06F13/36

Abstract

A memory hub includes a local queue that stores local memory responses, a bypass path that passes downstream memory responses, and a buffered queue coupled to the bypass path that stores downstream memory responses from the bypass path. A multiplexer is coupled to the local queue, buffered queue, and the bypass path and outputs responses from a selected one of the queues or the bypass path responsive to a control signal. Arbitration control logic is coupled to the multiplexer and the queues and develops the control signal to control the response output by the multiplexer.

Claims

1. A method of processing and forwarding memory responses in a memory system including a plurality of memory modules, each memory module including a memory hub coupled to memory devices, and the method comprising:

storing local memory responses having data retrieved from the memory devices, the local memory responses made in response to associated memory requests requesting the retrieved data from the memory devices;

storing downstream memory responses having data retrieved from downstream memory modules, the downstream memory responses made in response to associated memory requests requesting data from the downstream memory modules;

applying in each hub an independent arbitration algorithm to determine an order in which the stored local and downstream memory responses are forwarded to an upstream memory module; and

forwarding the local and downstream memory responses upstream according to the determined order.

2. The method of claim 1 wherein stored local memory responses are forwarded upstream prior to forwarding downstream memory responses upstream.

3. The method of claim 1 wherein stored downstream memory responses are forwarded upstream prior to forwarding local memory responses upstream.

4. The method of claim 1 wherein stored local and downstream memory responses are alternately forwarded upstream.

5. The method of claim 4 wherein a first number of local memory responses are forwarded upstream and a second number of downstream memory responses are forwarded upstream.

6. The method of claim 5 wherein the first and second numbers are equal.

7. The method of claim 1 wherein the stored local and downstream memory responses are forwarded upstream as a function of an age of a memory request associated with each memory response.

8. The method of claim 7 wherein a time stamp is assigned to each memory request when the request is received by each hub, and wherein the age of each memory request corresponds to the assigned time stamp.

9. The method of claim 1 wherein each of the local and downstream memory responses comprise data and a header identifying a memory request corresponding to the memory response.

10. A method of data forwarding by a plurality of memory modules each of which coupled to at least one other memory module, comprising:

receiving local data, the local data provided in response to an associated memory request requesting the local data;

receiving downstream data from at least one other memory module waiting to be forwarded, the downstream data provided in response to an associated memory request requesting the downstream data from the at least one other memory module;

in response to receiving local and downstream data waiting to be forwarded in one of the memory modules, applying an independent algorithm to determine an order in which the local and downstream data are to be forwarded; and

forwarding the local and downstream data in the determined order.

11. The method of claim 10 wherein the respective memory module applies an age-based algorithm that determines the order based on an age of a respective memory request associated with each of the local and downstream data, wherein the age is determined by a respective time stamp assigned to each memory request.

12. The method of claim 10 wherein the respective memory module applies an algorithm that alternatively forwards a first number of local data and a second number of downstream data.

13. The method of claim 10 wherein the respective memory module applying an independent algorithm to determine an order in which the local and downstream data are to be forwarded comprises a first memory module applying a first algorithm to determine a first order in which local and downstream data are forwarded from the first memory module, and a second memory module applying a second algorithm different from the first algorithm to determine a second order in which local and downstream data are forwarded from the second memory module.

14. A memory hub, comprising:

a local queue configured to receive and store local memory responses including local data, the local memory responses made in response to associated memory requests requesting the local data;

a buffered queue configured to receive and store downstream memory responses including downstream data, the downstream memory responses made in response to associated memory requests requesting the downstream data; and

control logic coupled to the local and buffered queues, the control logic operable to set a priority to forward the stored local and downstream memory responses using one of a plurality of arbitration algorithms, the control logic further operable to forward the stored local and downstream memory responses in accordance with the priority.

15. The memory hub of claim 14 wherein the control logic sets the priority according to an age-based algorithm that determines the priority based on an age of a respective memory request associated with each of the local and downstream memory responses, wherein the age is determined by a respective time stamp assigned to each memory request.

16. The memory hub of claim 14 wherein the control logic sets the priority according to an algorithm that alternatively forwards a first number of local memory responses and a second number of downstream memory responses.

17. The memory hub of claim 14 wherein the control logic is operable to forward local memory responses before downstream memory responses in a first mode and is further operable to forward downstream memory responses before local memory responses in a second mode.

18. A memory module, comprising:

at least one memory device; and

a memory hub coupled to the at least one memory device, the memory hub including;

a local queue configured to receive and store local memory responses having data, the local memory responses made in response to associated memory requests requesting the data;

a buffered queue configured to receive and store downstream memory responses having data, the downstream memory responses made in response to associated memory requests requesting the data;

a selection circuit coupled to the local and buffered queues, the selection circuit operable to forward the local and downstream memory responses from one of the queues in response to a control signal; and

arbitration logic coupled to the selection circuit, the arbitration logic operable to determine an order in which the local and downstream memory responses stored in the queues are forwarded using one of a plurality of arbitration algorithms, the arbitration logic further operable to generate the control signal based on the determined order.

19. The memory module of claim 18 wherein the arbitration logic employs a time-based algorithm that sets the order based on an age of a respective memory request associated with each of the local and downstream memory responses, wherein the age is determined by a respective time stamp assigned to each memory request.

20. The memory module of claim 18 wherein the arbitration logic determines the order using an arbitration algorithm that alternatively forwards a first number of local memory responses and a second number of downstream memory responses.

21. The memory module of claim 18 wherein the arbitration logic forwards local memory responses before downstream memory responses in a first mode, and forwards downstream memory responses before local memory responses in a second mode.

22. A computer system, comprising:

an input device;

an output device;

a processor coupled to the input and output devices; and

a plurality of memory modules, at least one of the memory modules coupled to the processor and each memory module coupled to at least one other memory module, each memory module comprising;

at least one memory device; and

a memory hub coupled to the at least one memory device, the memory hub operable to receive and store local memory responses having data retrieved from the at least one memory device and to receive and store memory responses having data retrieved from at least one other memory module, the local memory responses and the memory responses having data retrieved from the other memory module made in response to associated memory requests requesting the respective data, the memory hub further operable to transmit the local and forwarded memory responses in an order determined by one of a plurality of arbitration algorithms if the memory hub has both local and forwarded memory responses stored therein.

23. The computer system of claim 22 wherein the memory hub is operable to transmit local and forwarded memory responses using a time-based algorithm, and wherein the time-based algorithm determines the order based on an age of a respective memory request associated with each of the local and forwarded memory responses using a respective time stamp assigned to each memory request.

24. The computer system of claim 22 wherein the memory hub is operable to transmit local and forwarded memory responses using an arbitration algorithm that alternatively transmits a first number of local memory responses and a second number of forwarded memory responses.

25. The computer system of claim 22 wherein the memory hub of a first memory module applies a first arbitration algorithm to determine a first order in which local and forwarded memory responses are transmitted by the first memory hub, and wherein the memory hub of a second memory module applies a second arbitration algorithm different from the first arbitration algorithm to determine a second order in which local and forwarded memory responses are transmitted by the second memory hub.