Method of forming low resistance gate for power MOSFET applications
First Claim
1. A method of forming a trench gate field effect transistor, the method comprising:
- forming a trench in a silicon region;
forming a dielectric layer lining a sidewall of the trench and a bottom surface of the trench;
forming a first polysilicon layer on the bottom surface of the trench;
forming a first conductive material layer on an exposed surface of the first polysilicon layer;
forming a second polysilicon layer on an exposed surface of the first conductive material layer; and
performing rapid thermal processing to cause the first polysilicon layer, the second polysilicon layer and the first conductive material layer to react.
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Accused Products
Abstract
A method for forming a trench gate field effect transistor includes forming, in a semiconductor region, a trench followed by forming a dielectric layer lining a sidewall and a bottom surface of the trench. The method also includes, forming a first polysilicon layer on the bottom surface of the trench. The method further includes, forming a conductive material layer on an exposed surface of the first polysilicon layer and forming a second polysilicon layer on an exposed surface of the conductive material layer. The method still further includes, performing rapid thermal processing to cause the first polysilicon layer, the second polysilicon layer and the conductive material layer to react.
29 Citations
25 Claims
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1. A method of forming a trench gate field effect transistor, the method comprising:
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forming a trench in a silicon region; forming a dielectric layer lining a sidewall of the trench and a bottom surface of the trench; forming a first polysilicon layer on the bottom surface of the trench; forming a first conductive material layer on an exposed surface of the first polysilicon layer; forming a second polysilicon layer on an exposed surface of the first conductive material layer; and performing rapid thermal processing to cause the first polysilicon layer, the second polysilicon layer and the first conductive material layer to react. - View Dependent Claims (2, 3, 4, 5)
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6. A method of forming a trench gate field effect transistor, the method comprising:
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forming a trench in a silicon region; forming a dielectric layer lining a sidewall of the trench and a bottom surface of the trench; forming a polysilicon layer on the bottom surface of the trench; forming a conductive material layer, the conductive material layer having a vertically extending portion on at least a portion of the dielectric layer lining the sidewall of the trench and a horizontally extending portion on an exposed surface of the polysilicon layer; removing the vertically extending portion of the conductive material layer while at least part of the horizontally extending portion of the conductive material remains, performing rapid thermal processing to cause the polysilicon layer and the conductive material layer to react. - View Dependent Claims (7, 8, 9, 10, 11)
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12. A method of forming a shielded gate field effect transistor in a silicon trench, comprising:
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lining at least a lower portion of a sidewall of the trench and a bottom surface of the trench with a shield dielectric; depositing a shield electrode in at least a portion of the lower portion of the trench; forming an inter-electrode dielectric on an exposed surface of the shield electrode; forming a dielectric layer lining at least an upper portion of the sidewall of the trench and extending over a surface of a silicon region adjacent to the trench; forming a polysilicon layer in the trench on an exposed surface of the inter-electrode dielectric; forming a conductive material layer, the conductive material layer having a vertically extending portion on at least a portion of the dielectric layer lining the sidewall of the trench and a horizontally extending portion on an exposed surface of the polysilicon layer; and performing rapid thermal processing to cause the polysilicon layer and the conductive material layer to react. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20, 21, 22)
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23. A method of forming a trench gate field effect transistor, the method comprising:
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forming a trench in a silicon region; forming a dielectric layer lining a sidewall of the trench and a bottom surface of the trench; forming a polysilicon layer on the bottom surface of the trench; forming a conductive material layer on an exposed surface of the polysilicon layer; performing rapid thermal processing to cause the polysilicon layer and the conductive material layer to react; forming a protective layer in the trench on an exposed surface of a horizontally extending portion of the conductive material layer that is extending over the polysilicon layer; and etching the conductive material layer to remove unprotected portions of the conductive material layer extending over surfaces of the silicon region, the unprotected portions not being covered by the protective layer. - View Dependent Claims (24, 25)
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Specification