Substrate bonding with metal germanium silicon material

• US 8,592,926 B2
• Filed: 10/14/2011
• Issued: 11/26/2013
• Est. Priority Date: 01/21/2009
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: Montez, Ruben B., Pamatat, Alex P.
• Primary Examiner(s): Chaudhuri, Olik
• Assistant Examiner(s): JEFFERSON, QUOVAUNDA
• Application Number:
  US13/273,389
• Publication Number:
  US 20120068325A1
• Time in Patent Office: 774 Days
• Field of Search: 438/455, 257/678, 257/684, 257/690, 257/700, 257/729, 257/731, 257/782, 257/784, 257/786, 257/E23.02, 257/E23.023, 257/E23.04
• US Class Current: 257/417
• CPC Class Codes: B81B 2207/097 Interconnects arranged on the substrate or the lid, and covered by the package seal
• CPC Class Codes: B81C 1/00269 Bonding of solid lids or wafers to the substrate
• CPC Class Codes: B81C 2203/0109 Bonding an individual cap on the substrate
• CPC Class Codes: B81C 2203/019 characterised by the material or arrangement of seals between parts
• CPC Class Codes: H01L 21/50 Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
• CPC Class Codes: H01L 2224/02 Bonding areas; Manufacturing methods related thereto
• CPC Class Codes: H01L 2224/022 Protective coating, i.e. protective bond-through coating
• CPC Class Codes: H01L 2224/036 by patterning a pre-deposited material
• CPC Class Codes: H01L 2224/0391 Forming a passivation layer after forming the bonding area
• CPC Class Codes: H01L 2224/04026 Bonding areas specifically adapted for layer connectors
• CPC Class Codes: H01L 2224/05558 conformal layer on a patterned surface
• CPC Class Codes: H01L 2224/05572 the external layer extending out of an opening
• CPC Class Codes: H01L 2224/05638 the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
• CPC Class Codes: H01L 2224/2745 Physical vapour deposition [PVD], e.g. evaporation, or sputtering
• CPC Class Codes: H01L 2224/27452 Chemical vapour deposition [CVD], e.g. laser CVD
• CPC Class Codes: H01L 2224/2746 Plating
• CPC Class Codes: H01L 2224/276 by patterning a pre-deposited material
• CPC Class Codes: H01L 2224/29013 being rectangular or square
• CPC Class Codes: H01L 2224/29016 in side view
• CPC Class Codes: H01L 2224/29083 Three-layer arrangements
• CPC Class Codes: H01L 2224/29111 : Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/29117 : the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
• CPC Class Codes: H01L 2224/29124 : Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/29138 : the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
• CPC Class Codes: H01L 2224/29144 : Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/29155 : Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/29157 : Cobalt [Co] as principal constituent
• CPC Class Codes: H01L 2224/29166 : Titanium [Ti] as principal constituent
• CPC Class Codes: H01L 2224/29169 : Platinum [Pt] as principal constituent
• CPC Class Codes: H01L 2224/29181 : Tantalum [Ta] as principal constituent
• CPC Class Codes: H01L 2224/29184 : Tungsten [W] as principal constituent
• CPC Class Codes: H01L 2224/32145 : the bodies being stacked
• CPC Class Codes: H01L 2224/32225 : the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32502 : comprising an eutectic alloy
• CPC Class Codes: H01L 2224/32506 : comprising an eutectic alloy
• CPC Class Codes: H01L 2224/83 : using a layer connector
• CPC Class Codes: H01L 2224/83193 : wherein the layer connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/83203 : Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
• CPC Class Codes: H01L 2224/83411 : Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/83424 : Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/83444 : Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/83455 : Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/83457 : Cobalt [Co] as principal constituent
• CPC Class Codes: H01L 2224/83466 : Titanium [Ti] as principal constituent
• CPC Class Codes: H01L 2224/83469 : Platinum [Pt] as principal constituent
• CPC Class Codes: H01L 2224/83481 : Tantalum [Ta] as principal constituent
• CPC Class Codes: H01L 2224/83484 : Tungsten [W] as principal constituent
• CPC Class Codes: H01L 2224/83805 : involving forming a eutectic alloy at the bonding interface
• CPC Class Codes: H01L 2224/94 : at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
• CPC Class Codes: H01L 23/10 : characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
• CPC Class Codes: H01L 24/02 : Bonding areas on insulating substrates, e.g. chip carriers, H01L23/49816, H01L23/49838, H01L23/5389; Manufacturing methods related thereto
• CPC Class Codes: H01L 24/03 : Manufacturing methods
• CPC Class Codes: H01L 24/05 : of an individual bonding area
• CPC Class Codes: H01L 24/27 : Manufacturing methods
• CPC Class Codes: H01L 24/29 : of an individual layer connector
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 24/94 : at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01032 : Germanium [Ge]
• CPC Class Codes: H01L 2924/10157 : at the active surface
• CPC Class Codes: H01L 2924/15159 : Side view
• CPC Class Codes: H01L 2924/164 : Material

Abstract

In one embodiment, a semiconductor structure including a first substrate, a semiconductor device on the first substrate, a second substrate, and a conductive bond between the first substrate and the second substrate that surrounds the semiconductor device to seal the semiconductor device between the first substrate and the second substrate. The conductive bond comprises metal, silicon, and germanium. A percentage by atomic weight of silicon in the conductive bond is greater than 5%.

Claims

1. A semiconductor structure, comprising:

a first substrate;

a semiconductor device on the first substrate, a second substrate;

a conductive bond between the first substrate and the second substrate that surrounds the semiconductor device to seal the semiconductor device between the first substrate and the second substrate, wherein;

the conductive bond comprises metal, silicon, and germanium;

a multilayer stack located between the first substrate and the second substrate and formed on one of the first substrate or the second substrate, the multilayer stack includes a first layer comprising silicon, a second layer comprising polycrystalline silicon germanium, and a third layer comprising polycrystalline germanium, wherein the first layer is located closest to the one of the first substrate or the second substrate, the third layer is located furthest from the one of the first substrate or the second substrate, and the second layer is located between the first layer and the third layer;

wherein the conductive bond includes material formed from material of the first layer, material of the second layer, and material the third layer.

2. The structure of claim 1, wherein the metal includes aluminum.

3. The structure of claim 2, wherein the conductive bond includes a material that is characterized a ternary system including aluminum, silicon, and germanium.

4. The structure of claim 1, wherein the conductive bond is characterized as a eutectic compound including aluminum, germanium, and silicon.

5. The structure of claim 1 wherein the second substrate includes a cavity located on an inner side of the second substrate facing the first substrate within the seal, the cavity overlying the semiconductor device, wherein a portion of the multilayer stack is located in the cavity.

6. The structure of claim 1, wherein the semiconductor device is further characterized by the semiconductor device being a micro electromechanical system (MEMS) device.

7. The structure of claim 1 where the first substrate includes a bond pad electrically coupled to a structure of the semiconductor device, the bond pad is located outside the seal of the conductive bond.

8. The structure of claim 1 where the seal is characterized as a hermetic seal.

9. The structure of claim 1 wherein the first layer includes polycrystalline silicon.

10. The structure of claim 1 wherein the multilayer stack is formed on the second substrate.

11. The structure of claim 10 wherein the second substrate is part of a cap for the semiconductor device.

12. The structure of claim 1 wherein the first layer has a thickness in a range of 750-2500 Angstroms, the second layer has a thickness in a range of 500-2000 Angstroms, and the third layer has a thickness in a range of 2000-4000 Angstroms.

13. The structure of claim 1 wherein a germanium content of the second layer is in a range of 20-40 atomic percent.

14. A semiconductor structure, comprising:

a first substrate;

a micro electromechanical system (MEMS) device on the first substrate,

a second substrate;

a conductive bond between the first substrate and the second substrate that surrounds the MEMS device to hermetically seal the MEMS device between the first substrate and the second substrate, wherein;

the conductive bond is characterized as a eutectic compound that includes aluminum, germanium, and silicon;

a multilayer stack located between the first substrate and the second substrate and formed on one of the first substrate or the second substrate, the multilayer stack includes a first layer comprising silicon, a second layer comprising silicon germanium, and a third layer comprising germanium, wherein the first layer is located closest to the one of the first substrate or the second substrate, the third layer is located furthest from the one of the first substrate or the second substrate, and the second layer is located between the first layer and the third layer;

wherein the multilayer stack extends to the conductive bond.

15. The structure of claim 14 where the first substrate includes a bond pad electrically coupled to a structure of the MEMS device, the bond pad is located outside the hermetic seal of the conductive bond.

16. The structure of claim 14 wherein the second substrate includes a cavity located on an inner side of the second substrate facing the first substrate within the seal, the cavity overlying the MEMS device, wherein a portion of the multilayer stack is located in the cavity.

17. The structure of claim 14 wherein the first layer includes polycrystalline silicon, the second layer includes polycrystalline silicon germanium, and the third layer includes polycrystalline germanium.

18. The structure of claim 14 wherein the multilayer stack is formed on the second substrate.

19. A semiconductor structure, comprising:

a first substrate;

a micro electromechanical system (MEMS) device on the first substrate,

a second substrate;

a conductive bond between the first substrate and the second substrate that surrounds the MEMS device to hermetically seal the MEMS device between the first substrate and the second substrate, wherein;

the conductive bond is characterized as a eutectic compound that includes aluminum, germanium, and silicon;

a multilayer stack located between the first substrate and the second substrate and formed on one of the first substrate or the second substrate, the multilayer stack includes a first layer comprising silicon, a second layer comprising silicon germanium, and a third layer comprising germanium, wherein the first layer is located closest to the one of the first substrate or the second substrate, the third layer is located furthest from the one of the first substrate or the second substrate, and the second layer is located between the first layer and the third layer;

wherein the conductive bond includes material formed from material of the first layer, material of the second layer, and material the third layer.

20. The structure of claim 19 wherein the multilayer stack extends to the conductive bond.

21. A semiconductor structure, comprising:

a first substrate;

a semiconductor device on the first substrate,

a second substrate;

a conductive bond between the first substrate and the second substrate that surrounds the semiconductor device to seal the semiconductor device between the first substrate and the second substrate, wherein;

the conductive bond comprises metal, silicon, and germanium;

a multilayer stack located between the first substrate and the second substrate and formed on one of the first substrate or the second substrate, the multilayer stack includes a first layer comprising silicon, a second layer comprising polycrystalline silicon germanium, and a third layer comprising polycrystalline germanium, wherein the first layer is located closest to the one of the first substrate or the second substrate, the third layer is located furthest from the one of the first substrate or the second substrate, and the second layer is located between the first layer and the third layer;

wherein the multilayer stack extends to the conductive bond.

22. The structure of claim 21 wherein the conductive bond includes material formed from material of the first layer, material of the second layer, and material the third layer.