Methods, systems, and articles of manufacture for implementing a physical design of an electronic circuit with automatic snapping

• US 8,595,662 B1
• Filed: 04/12/2012
• Issued: 11/26/2013
• Est. Priority Date: 12/30/2011
• Status: Active Grant

• Current Assignee: Cadence Design Systems Incorporated (Cadence Group)
• Original Assignee: Cadence Design Systems Incorporated (Cadence Group)
• Inventors: Yu, Henry, Baudhuin, Joshua, Rosek, Timothy, Xu, Hui
• Primary Examiner(s): Parihar, Suchin
• Application Number:
  US13/445,832
• Time in Patent Office: 593 Days
• Field of Search: 716/100, 716/110
• US Class Current: 716/110
• CPC Class Codes: G06F 2111/04 Constraint-based CAD
• CPC Class Codes: G06F 30/39 Circuit design at the physical level physical level design for reconfigurable circuits G06F30/347

Abstract

Disclosed are methods and systems for providing a constraint-driven environment for implementing a physical design of an electronic circuit with automatic snapping. In some embodiments, the method identifies or creates an incomplete layout. The method identifies an object and constraints for the object. The method then identifies an approximate position for the object in the layout and automatically snaps the object to a drop location based on the approximate position while complying with relevant constraint(s). The method may further align an object with another object with some spacing in between in some embodiments. The method may also perform automatic layer-to-layer snapping between two sets of objects such as cell instances, each having at least one object on multiple layers.

Claims

1. A computer implemented method for implementing a physical design of an electronic circuit with automatic snapping, comprising:

using at least one processor or at least one processor core to perform a process the process comprising;

identifying a first object in a layout for a modification process that is to modify the first object in the layout;

identifying a first set of one or more constraints for the first object;

identifying a first approximate position of the first object in the layout;

determining a drop position for the first object in the layout based at least in part upon the first approximate position and one or more relevant constraints in the first set of one or more constraints; and

determining whether or not the one or more relevant constraints are satisfied during and before completion of the modification process.

2. The computer implemented method of claim 1, the process further comprising:

identifying the layout, in which the layout comprises at least a partial, incomplete physical design of the electronic circuit; and

performing the modification process on the first object.

3. The computer implemented method of claim 1, in which the modification process comprises at least one of:

translating the first object to a different location in the layout;

rotating the first object to a different orientation;

mirroring the first object in the layout;

resizing the first object;

altering a shape of the first object; and

altering a configuration of the first object.

4. The computer implemented method of claim 1, the process further comprising:

identifying a first part of the first object;

identifying a second part of a second object in the layout; and

aligning the first part of the first object with the second part of the second object with a spacing between the first part and the second part.

5. The computer implemented method of claim 1, the process further comprising:

identifying one or more target objects in the layout;

determining whether a result of the modification process satisfies a constraint, wherein the constraint comprises at least one of the first set of one or more constraints or at least one of one or more other constraints by using at least the one or more target objects; and

displaying a result of the action of determining whether the result of the modification process satisfies the constraint before a performance of the modification process on the object.

6. The computer implemented method of claim 5, the process further comprising:

identifying a primary object from a plurality of dynamic objects including the first object, in which the action of determining whether the result of the modification process satisfies the constraint is performed by further using the primary object.

7. The computer implemented method of claim 5, in which the action of determining whether the result of the modification process satisfies the constraint is performed before the performance of the modification process.

8. The computer implemented method of claim 1, the process further comprising:

determining a mask identification for the first object, in which at least a part of the layout is subject to a multiple-patterning lithography process that is to be used to manufacture the electronic circuit.

9. The computer implemented method of claim 1, in which the first set of one or more constraints comprises at least one of a net-based constraint, a multi-valued constraint, a net-based constraint, a voltage-based constraint, and a constraint imposing multiple requirements on multiple geometric characteristics of the first object.

10. The computer implemented method of claim 1, the process further comprising:

determining whether the first set of one or more constraints are satisfied during performance of the modification process and before the modification process is complete; and

displaying the result of the act of determining whether the relevant constraint is satisfied during the performance of the modification process and before the modification process is complete.

11. A computer implemented method for implementing a physical design of an electronic circuit with automatic snapping, comprising:

using at least one processor or at least one processor core to perform a process the process comprising;

identifying a first plurality of objects including a first object on a first layer and a second object on a second layer in a layout, wherein the first layer is situated above or below the second layer in the physical design of the electronic circuit;

identifying a second plurality of objects including a third object on the first layer and a fourth object on the second layer;

identifying a first approximate position for the first plurality of objects arising from a modification process performed on the first plurality of objects; and

determining a drop location for the first plurality of objects based at least in part upon the first approximate position by referencing at least one of the first layer or the second layer.

12. The computer implemented method of claim 11, the process further comprising:

performing the modification process on the first plurality of objects based at least in part upon the drop position, in which the modification process operates on the first plurality of objects as a whole without operating on the first object or the second object individually.

13. The computer implemented method of claim 12, the process further comprising:

determining a first relative position between the first object and the third object on the first layer;

determining a second relative position between the second object and the fourth object on the second layer;

associating a first priority level with the first relative position and a second priority level with the second relative position; and

determining whether the first priority level or the second priority level is to be used for the action of determining the drop location.

14. The computer implemented method of claim 13, the action of determining the first relative position comprising:

identifying a first position or a first reference point of the first object and a third position or a third reference point of the third object in the layout, wherein

the first reference point is used to determine the first position of the first object in the layout, and

the third reference point is used to determine the third position of the third object in the layout; and

determining the first relative position between the first object and the third object based at least in part upon the first position and the third position.

15. The computer implemented method of claim 13, the action of determining the second relative position comprising:

identifying a second position or a second reference point of the second object and a fourth position or a fourth reference point of the fourth object in the layout, wherein

the second reference point is used to determine the second position of the second object in the layout, and

the fourth reference point is used to determine the fourth position of the fourth object in the layout; and

determining the second relative position between the second object and the fourth object based at least in part upon the second position and the fourth position.

16. The computer implemented method of claim 13, the action of identifying the first approximate position comprising:

identifying a data capturing process;

identifying a data capturing criterion;

identifying a characteristic of the modification process; and

identifying a position of the first plurality of objects in the layout as the first approximate position based at least in part upon the data capturing criterion and the characteristic of the modification process.

17. The computer implemented method of claim 13, the action of determining whether the first priority level or the second priority level is to be used comprising:

identifying or determining a first metric comprising at least one of a first cost, a first objective function, and a first impact of the first priority level;

identifying or determining a second metric comprising at least one of a second cost, a second objective function, or a second impact of the second priority level;

analyzing the first metric and the second metric to improve one or more aspects of the layout; and

determining whether the first priority level or the second priority level is to be used in determining the drop location based at least in part on a result of the act of analyzing the first metric and the second metric.

18. The computer implemented method of claim 12, the action of performing the modification process comprising:

applying one or more operations from the modification process to the first plurality of objects;

identifying one or more triggers from a call-back mechanism;

associating the one or more triggers with one or more priority levels;

invoking at least some of the one or more triggers during a performance of the modification process based at least in part upon the one or more priority levels; and

storing a result of the modification process in a scratch pad.

19. The computer implemented method of claim 12, the process further comprising:

determining whether a constraint is satisfied before completion of a performance of the modification process; and

presenting a result of the act of determining whether the constraint is satisfied before the completion of the performance of the modification process.

20. An article of manufacture comprising a non-transitory computer readable storage medium having a sequence of instructions stored thereupon which, when executed by at least one processor or at least one processor core, causes the at least one processor or the at least one processor core to perform a method for implementing a physical design of an electronic circuit with automatic snapping, the method comprising:

using at least one processor or at least one processor core to perform a process, the process comprising;

identifying a first object in a layout for a modification process that is to modify the first object in the layout;

identifying a first set of one or more constraints for the first object;

identifying a first approximate position of the first object in the layout;

determining a drop position for the first object in the layout based at least in part upon the first approximate position and one or more relevant constraints in the first set of one or more constraints; and

determining whether or not the one or more relevant constraints are satisfied during and before completion of the modification process.

21. The article of manufacture of claim 20, the process further comprising:

identifying the layout, in which the layout comprises at least a partial, incomplete physical design of the electronic circuit; and

performing the modification process on the first object.

22. The article of manufacture of claim 20, the process further comprising:

identifying a first part of the first object;

identifying a second part of a second object in the layout; and

aligning the first part of the first object with the second part of the second object with a spacing between the first part and the second part.

23. The article of manufacture of claim 20, the process further comprising:

identifying one or more target objects in the layout;

determining whether a result of the modification process satisfies a constraint, wherein the constraint comprises at least one of the first set of one or more constraints or at least one of one or more other constraints by using at least the one or more target objects; and

displaying a result of the action of determining whether the result of the modification process satisfies the constraint before a performance of the modification process on the object.

24. The article of manufacture of claim 23, the process further comprising:

identifying a primary object from a plurality of dynamic objects including the first object, in which the action of determining whether the result of the modification process satisfies the constraint is performed by further using the primary object.

25. A system for implementing a physical design of an electronic circuit with automatic snapping, comprising:

at least one processor or at least one processor core that is to;

identify a first object in a layout for a modification process that is to modify the first object in the layout;

identify a first set of one or more constraints for the first object;

identify a first approximate position of the first object in the layout;

determine a drop position for the first object in the layout based at least in part upon the first approximate position and one or more relevant constraints in the first set of one or more constraints; and

determining whether or not the one or more relevant constraints are satisfied during and before completion of the modification process.

26. The system of claim 25, the at least one processor or at least one processor core is further to:

identify the layout, in which the layout comprises at least a partial, incomplete physical design of the electronic circuit; and

perform the modification process on the first object.

27. The system of claim 25, the at least one processor or at least one processor core is further to:

identify a first part of the first object;

identify a second part of a second object in the layout; and

align the first part of the first object with the second part of the second object with a spacing between the first part and the second part.

28. The system of claim 25, the at least one processor or at least one processor core is further to:

identify one or more target objects in the layout;

determine whether a result of the modification process satisfies a constraint, wherein the constraint comprises at least one of the first set of one or more constraints or at least one of one or more other constraints by using at least the one or more target objects; and

display a result of the action of determining whether the result of the modification process satisfies the constraint before a performance of the modification process on the object.

29. The system of claim 28, the at least one processor or at least one processor core is further to:

identify a primary object from a plurality of dynamic objects including the first object, in which the action of determining whether the result of the modification process satisfies the constraint is performed by further using the primary object.

30. An article of manufacture comprising a non-transitory computer readable storage medium having a sequence of instructions stored thereupon which, when executed by at least one processor or at least one processor core, causes the at least one processor or the at least one processor core to perform a method for implementing a physical design of an electronic circuit with automatic snapping, the method comprising:

using at least one processor or at least one processor core to perform a process, the process comprising;

identifying a first plurality of objects including a first object on a first layer and a second object on a second layer in a layout, wherein the first layer is situated above or below the second layer in the physical design of the electronic circuit;

identifying a second plurality of objects including a third object on the first layer and a fourth object on the second layer;

identifying a first approximate position for the first plurality of objects arising from a modification process performed on the first plurality of objects; and

determining a drop location for the first plurality of objects based at least in part upon the first approximate position by referencing at least one of the first layer or the second layer.

31. The article of manufacture of claim 30, the process further comprising:

performing the modification process on the first plurality of objects based at least in part upon the drop position, in which the modification process operates on the first plurality of objects as a whole without operating on the first object or the second object individually.

32. The article of manufacture of claim 31, the process further comprising:

determining a first relative position between the first object and the third object on the first layer;

determining a second relative position between the second object and the fourth object on the second layer;

associating a first priority level with the first relative position and a second priority level with the second relative position; and

determining whether the first priority level or the second priority level is to be used for the action of determining the drop location.

33. A system for implementing a physical design of an electronic circuit with automatic snapping, comprising:

at least one processor or at least one processor core that is to;

identify a first plurality of objects including a first object on a first layer and a second object on a second layer in a layout, wherein the first layer is situated above or below the second layer in the physical design of the electronic circuit;

identify a second plurality of objects including a third object on the first layer and a fourth object on the second layer;

identify a first approximate position for the first plurality of objects arising from a modification process performed on the first plurality of objects; and

determine a drop location for the first plurality of objects based at least in part upon the first approximate position by referencing at least one of the first layer or the second layer.

34. The system of claim 33, the at least one processor or at least one processor core is further to:

perform the modification process on the first plurality of objects based at least in part upon the drop position, in which the modification process operates on the first plurality of objects as a whole without operating on the first object or the second object individually.

35. The system of claim 34, the at least one processor or at least one processor core is further to:

determine a first relative position between the first object and the third object on the first layer;

determine a second relative position between the second object and the fourth object on the second layer;

associate a first priority level with the first relative position and a second priority level with the second relative position; and

determine whether the first priority level or the second priority level is to be used for the action of determining the drop location.