Logic circuit, integrated circuit including the logic circuit, and method of operating the integrated circuit
First Claim
Patent Images
1. A logic circuit comprising:
- at least one variable resistance device configured such that a resistance value of the at least one variable resistance device varies according to at least one selected value, the selected value being selected from among a voltage and a current of an input signal, the at least one variable resistance device being configured to memorize the resistance value,the logic circuit being configured to store multi-level data by setting the memorized resistance value; and
a write unit including the at least one variable resistance device, a first write switch and a second write switch, the write unit being configured to write the multi-level data to the variable resistance device by setting the resistance value of the at least one variable resistance device based on the at least one selected value and a write enable signal, the variable resistance device including at least a first terminal and a second terminal, the first and second terminals being separate terminals,wherein the first write switch is connected to the variable resistance device via the first terminal, the first switch is configured such that a conductivity of the first write switch is controlled based on the write enable signal, the second write switch is connected to the variable resistance device via the second terminal, and the second switch is configured such that a conductivity of the second write switch is controlled based on the write enable signal.
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Abstract
The logic circuit includes at least one variable resistance device configured such that a resistance value of the at least one variable resistance device varies according to at least one selected value. The selected value is selected from among a voltage and a current of an input signal, and the at least one variable resistance device is configured to memorize the resistance value. The logic circuit is configured to store multi-level data by setting the memorized resistance value.
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Citations
30 Claims
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1. A logic circuit comprising:
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at least one variable resistance device configured such that a resistance value of the at least one variable resistance device varies according to at least one selected value, the selected value being selected from among a voltage and a current of an input signal, the at least one variable resistance device being configured to memorize the resistance value, the logic circuit being configured to store multi-level data by setting the memorized resistance value; and a write unit including the at least one variable resistance device, a first write switch and a second write switch, the write unit being configured to write the multi-level data to the variable resistance device by setting the resistance value of the at least one variable resistance device based on the at least one selected value and a write enable signal, the variable resistance device including at least a first terminal and a second terminal, the first and second terminals being separate terminals, wherein the first write switch is connected to the variable resistance device via the first terminal, the first switch is configured such that a conductivity of the first write switch is controlled based on the write enable signal, the second write switch is connected to the variable resistance device via the second terminal, and the second switch is configured such that a conductivity of the second write switch is controlled based on the write enable signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A logic circuit comprising:
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at least one variable resistance device configured such that a resistance value of the at least one variable resistance device varies according to at least one selected value, the selected value being selected from among a voltage and a current of an input signal, the at least one variable resistance device being configured to memorize the resistance value, the logic circuit being configured to store multi-level data by setting the memorized resistance value, a write unit including the at least one variable resistance device, the write unit being configured to write the multi-level data to the variable resistance device by setting the resistance value of the at least one variable resistance device based on the at least one selected value and a write enable signal; and a read unit configured to read the multi-level data corresponding to the set resistance value of the at least one variable resistance and a read enable signal, wherein the write unit includes, an input signal receiving unit connected between a first power supply voltage terminal and a plurality of input nodes, the input signal receiving unit being configured to activate one of the plurality of input nodes according to the input signal, a first write switching unit connected between the plurality of input nodes and a ground voltage terminal, and configured to be switched on based on an inverted signal of the write enable signal, a current supply unit connected between a second power supply voltage terminal and a first node, the current supply unit being configured to supply a write current to the first node based on an activated input node from among the plurality of input nodes, the at least one variable resistance device connected between the first node and a second nodes, and a second write switch connected between the second node and the ground voltage terminal, and configured to be switched on based on the write enable signal, wherein the current supply unit includes, a plurality of current adjustment devices commonly connected to the second power supply voltage terminal, and configured to be switched on according to voltages of the plurality of input nodes, respectively, sizes of the plurality of current adjustment devices being different from one another. - View Dependent Claims (17, 18, 19, 20, 21, 22, 23, 24, 25)
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26. An integrated circuit comprises:
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a controller configured to produce a write enable signal and a read enable signal; a write unit configured to receive the write enable signal; and a read unit configured to receive the read enable signal, wherein the write unit includes at least one variable resistance device configured such that a resistance value of the at least one variable resistance device varies according to at least one selected value, the selected value being selected from among a voltage and current of an input signal, the at least one variable resistance device being configured to memorize the resistance value, the write unit being configured to write multi-level data to the at least one variable resistance device by setting the resistance value based on the write enable signal, and wherein the read unit is configured to read the multi-level data corresponding to the set resistance value of the at least one variable resistance device, based on the read enable signal, the reading unit including, a first read switch connected between a first power supply voltage terminal and a first node, and configured to be switched on based on the read enable signal; a bias unit connected between the first node and a second node, and configured to be switched on and to supply a read current to the second node according to a bias signal; and a second read switch connected between a third node and a ground voltage terminal, and configured to be switched on based on the read enable signal, and wherein the at least one variable resistance device is connected between the second node and a third node. - View Dependent Claims (27)
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28. A method of operating a logic circuit that includes at least one variable resistance device that memorizes a resistance value, the resistance value varying according to at least one selected value, the selected value being selected from among a voltage and a current of an input signal, the method comprising:
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setting the resistance value of the at least one variable resistance device based on the at least one selected value, if a write enable signal is activated; and reading multi-level data corresponding to the set resistance value of the at least one variable resistance device by sensing the resistance value, if a read enable signal is activated, wherein the at least one variable resistance device includes at least a first terminal and a second terminal, the first and second terminals being separate terminals, a first write switch is connected to the variable resistance device via the first terminal, and a second write switch is connected to the variable resistance device via the second terminal, and wherein the setting the resistance value includes changing a conductivity of the first write switch based on the write enable signal and changing a conductivity of the second write based on the write enable signal such that a write current flows between the first and second terminals of the variable resistance device. - View Dependent Claims (29, 30)
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Specification