Power control for PXI express controller

• US 8,607,081 B2
• Filed: 07/25/2012
• Issued: 12/10/2013
• Est. Priority Date: 11/17/2006
• Status: Active Grant

• Current Assignee: National Instruments Corporation (Emerson Electric Company)
• Original Assignee: National Instruments Corporation (Emerson Electric Company)
• Inventors: Peterson, Keith D., Kennedy, Jeffrey L.
• Primary Examiner(s): YANCHUS III, PAUL B
• Application Number:
  US13/557,346
• Publication Number:
  US 20120290858A1
• Time in Patent Office: 503 Days
• Field of Search: 713/1, 713/2, 713/300, 713/320, 713/322, 713/323, 713/324, 713/340
• US Class Current: 713/300
• CPC Class Codes: G06F 1/26 Power supply means, e.g. regulation thereof for memories G11C

Abstract

A PXI Express controller may be configured to support at least three different conditions under which the controller may be turned on. If a chassis (e.g. a PXI Express chassis) interfacing with the controller has a power button, the first condition (which may be considered normal operation) may be met when the power button is being pressed at a time auxiliary power is present. When the chassis does not have a power button, the second condition may be met when the power is switched on at a time auxiliary power is present, and the third condition may be met when the power is switched on at a time auxiliary power is not present. A state-machine comprised in the PXI Express controller may be configured to interface with a chipset equally comprised in the PXI Express controller, to perform the control functions required to provide the support for the three different conditions.

Claims

1. A system comprising:

a circuit board configured to insert into a chassis to couple the circuit board to the chassis, wherein the chassis comprises a power supply configured to provide main power and auxiliary power to the system, wherein the circuit board comprises;

a chipset configured to at least partially implement functions performed by the system; and

control logic coupled to the chipset via a first signal line configured to carry a first signal;

wherein the control logic is configured to automatically assert the first signal in response to the power supply asserting a feedback signal in response to the power supply being switched on and providing main power to the system;

wherein the chipset is configured to instruct the system to turn on in response to the first control signal being automatically asserted by the control logic; and

wherein the control logic is configured to keep the system turned off when auxiliary power is applied to the system at a point in time when the system is turned off.

2. The system of claim 1, wherein the control logic is further coupled to the chipset via a second signal line configured to carry a second signal, wherein the second signal indicates to the control logic:

that the chipset has instructed the system to turn on;

or

that the chipset has instructed the system to turn off.

3. The system of claim 1, wherein the chassis further comprises a power button configured to couple to the first signal line, wherein the power button is configured to assert the first signal when pressed;

wherein the chipset is configured to instruct the system to turn on in response to the power button being pressed at a time when;

auxiliary power is present in the system; and

the power supply is not providing main power to the system.

4. The system of claim 3, wherein the control logic is further coupled to the chipset via a second signal line configured to carry a second signal, wherein in instructing the system to turn on, the chipset is configured to assert the second signal;

wherein the control logic is configured to assert a third signal to the power supply to turn on the power supply, in response to the second signal being asserted.

5. The system of claim 4, wherein the control logic is configured to receive a fourth signal from the power supply, wherein the power supply is configured to assert the fourth signal to indicate that the power supply is switched on and is providing main power to the system.

6. A method for powering a system, wherein the system comprises control logic and system logic, the method comprising:

keeping the system turned off when auxiliary power is applied to the system at a point in time when the system is turned off; and

when the system is turned off, performing one of;

(a) switching on a power supply to provide main power to the system;

or and

(b) pressing a power button to instruct the system logic to boot up the system;

in response to (b);

(c) asserting a power button signal to the system logic;

(d) the system logic instructing the system to boot up in response to (c);

(e) the control logic turning on the power supply in response to (d);

(f) the power supply indicating to the control logic that the power supply is on and providing main power to the system; and

(g) the system booting up in response to (f); and

in response to (a);

(h) performing (f);

(i) the control logic asserting the power button signal to the system logic in response to (h);

(j) the system logic instructing the system to boot up in response to (i); and

(k) the system booting up in response to (j).

7. The method of claim 6, further comprising:

(l) when the system is on, instructing the system logic to shut off the system;

(m) the system logic instructing the control logic that the system logic has been instructed to shut off the system;

(n) the control logic shutting off the power supply in response to (m); and

(o) the system shutting off in response to (l) and (n).

8. The method of claim 6, further comprising:

(p) enabling an instant off mode in the control logic;

(q) when the system is on, pressing the power button;

(r) the control logic shutting off the power supply in response to (q);

(s) performing (o).

9. A system comprising:

a chassis comprising a power supply configured to provide;

main power and auxiliary power to the system; and

a power supply status signal indicating whether the power supply is providing main power to the system; and

a circuit board configured to be inserted into the chassis, the circuit board comprising;

a chipset configured to control one or more system functions;

control logic coupled to the chipset and configured to receive the power supply status signal, wherein the control logic is further configured to automatically assert a power button signal to the chipset in response to the power supply status signal indicating that the power supply is providing main power to the system when the system is off;

wherein the chipset is configured to instruct the system to turn on in response to the power button signal being asserted by the control logic.

10. The system of claim 9, wherein the chassis comprises a switch configured to switch on the power supply to provide main power to the system.

11. The system of claim 9, wherein the power supply is configured to provide auxiliary power to the system once the power supply is coupled to an external power source that provides power to the power supply.

12. The system of claim 11, wherein the control logic is configured to prevent the power supply from providing main power to the system when one or more of the following occur:

the system is off and the circuit board is inserted into the chassis at a time auxiliary power is present in the system;

or

the system is off and auxiliary power is provided to the system after the circuit board has been inserted into the chassis.

13. The system of claim 9, wherein the chassis further comprises a power button configured to assert the power button signal to the chipset when the power button is pressed;

wherein the chipset is configured to instruct the system to turn on in response to the power button signal being asserted by the power button when the system is off, wherein the chipset is further configured to assert a power indicator signal to the control logic, wherein the asserted power indicator signal indicates to the control logic that the chipset has instructed the system to turn on;

wherein the control logic is configured to enable the power supply to provide main power to the system in response to the asserted power indicator signal; and

wherein the system is configured to boot up in response to the chipset having instructed the system to turn on and the power supply providing main power to the system.