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Control circuit capable of identifying error data in flash memory and storage system and method thereof

  • US 8,607,123 B2
  • Filed: 08/17/2009
  • Issued: 12/10/2013
  • Est. Priority Date: 06/23/2009
  • Status: Active Grant
First Claim
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1. A flash memory control circuit, comprising:

  • a microprocessor unit;

    a first interface unit, coupled to the microprocessor unit, and used to connect a flash memory, wherein the flash memory has a plurality of physical blocks, and each of the physical blocks has a plurality of pages;

    a second interface unit, coupled to the microprocessor unit, and used to connect a computer host;

    an error correcting unit, coupled to the microprocessor unit;

    a memory management unit, coupled to the microprocessor unit, and used to divide each of the pages into at least one data bit area, and at least one redundancy bit area and at least one error correcting bit area corresponding to the data bit area, wherein the data bit area has a plurality of sectors to store a plurality of sector data; and

    a marking unit, coupled to the microprocessor unit,wherein when the computer host writes a plurality of sector data into one of the data bit areas, the error correcting unit generates an error correcting code according to the sector data, the memory management unit writes the sector data into one of the data bit areas and the error correcting code into the corresponding error correcting bit area, and the marking unit records the data accuracy marks as a normal status in the corresponding redundancy bit area, wherein each of the data accuracy marks is corresponding to one of the sector data,wherein when the memory management unit copies the sector data stored in one of the data bit areas to another one of the data bit areas, the error correcting unit determines whether the sector data cannot be corrected according to the error correcting code in the corresponding error correcting bit area,wherein when the sector data cannot be corrected, the marking unit records the data accuracy marks in the corresponding redundancy bit area as an error status.

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