Stability enhancements in metal oxide semiconductor thin film transistors

• US 8,610,119 B2
• Filed: 12/04/2009
• Issued: 12/17/2013
• Est. Priority Date: 12/24/2008
• Status: Active Grant

• Current Assignee: 3M Innovative Properties Company (3M Company)
• Original Assignee: 3M Innovative Properties Company (3M Company)
• Inventors: Theiss, Steven D., Redinger, David H.
• Primary Examiner(s): Pham, Long
• Application Number:
  US13/141,118
• Publication Number:
  US 20110253998A1
• Time in Patent Office: 1,474 Days
• Field of Search: 257/43, 257/E21.476, 257/E21.461, 257/E29.005, 438/104
• US Class Current: 257/43
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

A plasma hydrogenated region in the dielectric layer of a semiconductor thin film transistor (TFT) structure improves the stability of the TFT. The TFT is a multilayer structure including an electrode, a dielectric layer disposed on the electrode, and a metal oxide semiconductor on the dielectric. Exposure of the dielectric layer to a hydrogen containing plasma prior to deposition of the semiconductor produces a plasma hydrogenated region at the semiconductor-dielectric interface. The plasma hydrogenated region incorporates hydrogen which decreases in concentration from semiconductor/dielectric interface into the bulk of one or both of the dielectric layer and the semiconductor layer.

Claims

1. A method of fabricating a multilayer semiconductor structure, comprising:

forming an electrode layer;

forming a dielectric layer proximate to the electrode layer;

after forming the dielectric layer, exposing the dielectric layer to a hydrogen-containing plasma; and

after exposing the dielectric layer to the hydrogen-containing plasma, forming a metal oxide semiconductor layer proximate to the dielectric layer

wherein a hydrogenated region is formed at a semiconductor-dielectric interface of the dielectric layer, the hydrogenated region incorporating hydrogen that decreases in concentration from the semiconductor-dielectric interface into one or both of the dielectric layer and the semiconductor layer.

2. The method of claim 1, wherein forming the dielectric layer comprises anodizing the electrode layer.

3. The method of claim 1, wherein the semiconductor layer comprises ZnO and the dielectric layer comprises Al₂O₃.

4. The method of claim 1, wherein forming the electrode layer, forming the dielectric layer, exposing the dielectric layer to the hydrogen-containing plasma, and forming the semiconductor layer are performed in a roll to roll process on a flexible substrate.

5. The method of claim 1, wherein forming the dielectric layer and forming the semiconductor layer are performed at a temperature of less than 100 C.

6. The method of claim 1, wherein the hydrogen-containing plasma comprises about 5% hydrogen.

7. The method of claim 1, wherein the hydrogen-containing plasma comprises deuteruim.

8. The method of claim 1, wherein exposing the dielectric layer to the hydrogen-containing plasma comprises exposing the dielectric layer to at least about 0.01 Watts/cm² for about 3-5 minutes.

9. The method of claim 1, wherein exposing the dielectric layer to the hydrogen-containing plasma further comprises creating a non-uniform hydrogen concentration profile that decreases from a first level at a first point at a surface of the dielectric layer to a second level at a second point in the dielectric layer farther from the surface.

10. The method of claim 1, wherein:

forming the multilayer semiconductor structure comprises forming a thin film transistor; and

exposing the dielectric layer to a hydrogen-containing plasma comprises incorporating hydrogen into a hydrogenated region at a surface of the dielectric, the hydrogenated region including the incorporated hydrogen stabilizing a threshold voltage of the transistor.

11. A method of fabricating a multilayer semiconductor structure, comprising:

forming an electrode layer;

forming a dielectric layer proximate to the electrode layer;

after forming the dielectric layer, processing the dielectric layer to create a hydrogenated region at a surface of the dielectric layer, the hydrogenated region having a non-uniform hydrogen profile wherein a concentration of hydrogen decreases from a first point at a surface of the dielectric to a second point within dielectric layer; and

forming a metal oxide semiconductor layer proximate to the dielectric layer.

12. The method of claim 11, wherein processing the dielectric layer comprises exposing the dielectric layer to a hydrogen-containing plasma after formation of the dielectric.

13. The method of claim 11, wherein processing the dielectric layer comprises exposing the dielectric layer to a deuterium-containing plasma to create a non-uniform deuterium profile in the dielectric layer wherein a concentration of deuterium decreases from a first point at a surface of the dielectric to a second point within dielectric layer.

14. The method of claim 11, wherein:

the electrode layer comprises aluminum (Al);

the dielectric comprises aluminum oxide (Al₂O₃); and

the semiconductor comprises zinc oxide (ZnO).

15. The method of claim 11, wherein processing the dielectric layer comprises increasing a hydrogen concentration at a surface of the dielectric layer, wherein a hydrogen concentration in a bulk of the dielectric layer near an interface between the electrode and the dielectric layer is not substantially increased by the processing.

16. A multilayer semiconductor structure, comprising:

an electrode;

a dielectric layer disposed proximate to the electrode;

a semiconductor layer comprising a metal oxide semiconductor disposed proximate to the dielectric layer; and

a hydrogenated region at a semiconductor-dielectric interface of the dielectric layer, wherein the hydrogenated region incorporates hydrogen that decreases in concentration from the semiconductor-dielectric interface into one or both of the dielectric layer and the semiconductor layer.

17. The semiconductor structure of claim 16, wherein the hydrogenated region comprises a plasma hydrogenated region.

18. The semiconductor structure of claim 16, wherein the metal oxide semiconductor comprises ZnO and the dielectric comprises aluminum oxide.

19. The semiconductor structure of claim 16, wherein the hydrogen incorporated in the hydrogenated region comprises deuterium.

20. The semiconductor structure of claim 16, further comprising a flexible polymeric substrate, wherein the electrode is disposed on the polymeric substrate.