Fast envelope system calibration

• US 8,611,402 B2
• Filed: 02/01/2012
• Issued: 12/17/2013
• Est. Priority Date: 02/02/2011
• Status: Active Grant

• Current Assignee: Qorvo US, Inc. (Qorvo, Inc.)
• Original Assignee: RF Micro Devices Incorporated (Qorvo, Inc.)
• Inventors: Chiron, Jean-Frederic
• Primary Examiner(s): WANG, TED M
• Application Number:
  US13/363,888
• Publication Number:
  US 20120195352A1
• Time in Patent Office: 685 Days
• Field of Search: 375/219, 375/222, 375/295, 375/297
• US Class Current: 375/219
• CPC Class Codes: H03F 1/0222 by using a signal derived from the input signal
• CPC Class Codes: H03F 1/025 by using a signal derived from the input signal
• CPC Class Codes: H03F 1/3294 Acting on the real and imaginary components of the input signal
• CPC Class Codes: H03F 2200/102 A non-specified detector of a signal envelope being used in an amplifying circuit
• CPC Class Codes: H03F 2200/105 A non-specified detector of the power of a signal being used in an amplifying circuit
• CPC Class Codes: H03F 2200/15 the supply or bias voltage or current at the drain side of a FET being continuously controlled by a controlling signal
• CPC Class Codes: H03F 2200/336 A I/Q, i.e. phase quadrature, modulator or demodulator being used in an amplifying circuit
• CPC Class Codes: H03F 2200/504 the supply voltage or current being continuously controlled by a controlling signal, e.g. the controlling signal of a transistor implemented as variable resistor in a supply path for, an IC-block showed amplifier
• CPC Class Codes: H03F 2200/99 A diode as rectifier being used as a detecting circuit in an amplifying circuit
• CPC Class Codes: H03F 2201/3233 Adaptive predistortion using lookup table, e.g. memory, RAM, ROM, LUT, to generate the predistortion
• CPC Class Codes: H03F 3/189 High-frequency amplifiers, e.g. radio frequency amplifiers
• CPC Class Codes: H03F 3/195 in integrated circuits
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H03G 3/004 Control by varying the supply voltage
• CPC Class Codes: H03G 3/3042 in modulators, frequency-changers, transmitters or power amplifiers transmission power control in bidirectional transmission systems H04W52/04
• CPC Class Codes: H04B 17/0085 using test signal generators
• CPC Class Codes: H04B 17/13 of power amplifiers, e.g. gain or non-linearity

Abstract

Disclosed is a transceiver for an envelope following system that includes a power amplifier (PA) having a signal input, a signal output, and a power input that receives power from a power management system that modulates a supply voltage provided to the PA in response to an envelope signal. The transceiver includes a calibration subsystem that is adapted to provide a first test signal to the signal input of the PA and to provide a second test signal to the power management system in place of the envelope signal. The calibration subsystem is programmed with calibration methods that sweep the first test signal through a first range and to sweep the second test signal through a second range in order to derive values that make up a pseudo-envelope look-up table (LUT) that is usable by the transceiver.

Claims

1. A transceiver for an envelope following system that includes a power amplifier (PA) having a signal input, a signal output, and a power input that receives power from a power management system that modulates a supply voltage provided to the PA in response to an envelope signal, the transceiver comprising:

calibration circuitry adapted to provide a first test signal to the signal input of the PA and to provide a second test signal to the power management system in place of the envelope signal; and

a calibration subsystem adapted to control the calibration circuitry to sweep the first test signal through a first range and to sweep the second test signal through a second range.

2. The transceiver of claim 1 further including a power measurement circuit adapted to measure power associated with the signal output of the PA as the PA responds to the first test signal and the second test signal.

3. The transceiver of claim 2 further including a memory for storing power measurement data points along with corresponding data points of the first test signal and corresponding data points of the second test signal.

4. The transceiver of claim 1 wherein the calibration subsystem includes a program to linearly sweep the first range from a predetermined initial data point to a predetermined final data point.

5. The transceiver of claim 1 wherein the calibration subsystem includes a program to linearly sweep the second range from a predetermined initial data point to a predetermined final data point.

6. The transceiver of claim 1 wherein the calibration subsystem includes a program to exponentially sweep the first range from a predetermined initial data point to a predetermined final data point.

7. The transceiver of claim 1 wherein the calibration subsystem includes a program to exponentially sweep the second range from a predetermined initial data point to a predetermined final data point.

8. The transceiver of claim 1 wherein the calibration circuitry includes an in-phase/quadrature (I/Q) multiplexer that is adapted to switch the I/Q multiplexer between a normal mode in which I/Q signals pass from an I/Q digital modulator to an I digital-to-analog converter (DAC) and a Q DAC and a calibration mode that passes calibration signals to the I DAC and Q DAC in place of the I/Q signals.

9. The transceiver of claim 8 wherein the calibration circuitry includes an envelope multiplexer to pass an envelope signal from an envelope calculator to an envelope DAC in the normal mode and to pass a calibration signal from the calibration subsystem to the envelope DAC in place of the envelope signal while in the calibration mode.

10. A method of calibrating a pseudo-envelope system having a transceiver with an in-phase/quadrature (I/Q) digital modulator and calibration circuitry that includes an I/Q multiplexer coupled to an in-phase (I) digital-to-analog converter (DAC) and a quadrature (Q) DAC, an envelope multiplexer coupled to an envelope DAC, and a calibration subsystem that is adapted to switch the I/Q multiplexer between a normal mode in which I/Q signals pass from the I/Q digital modulator to the I DAC and the Q DAC and an envelope signal passes from an envelope calculator and a calibration mode in which calibration signals pass from the calibration subsystem to the I DAC, the Q DAC and the envelope DAC in place of the I/Q signals and the envelope signal, comprising:

switching the I/Q multiplexers and envelope multiplexer from the normal mode to the calibration mode;

sweeping the calibration signals through predetermined ranges while measuring average power amplifier (PA) power and storing average PA power measurements in a data buffer; and

switching the I/Q multiplexers and the envelope multiplexer from the normal mode to the calibration mode.

11. The method of claim 10 wherein sweeping the calibration signals through predetermined ranges is performed linearly.

12. The method of claim 10 wherein sweeping the calibration signals through predetermined ranges is performed exponentially.

13. The method of claim 10 wherein the predetermined ranges are defined by piecewise linear boundaries.

14. The method of claim 10 wherein sweeping the calibration signals through predetermined ranges begins with generating a predetermined minimum envelope voltage.

15. The method of claim 14 wherein sweeping the calibration signals includes a synchronization pulse that is usable to trigger external PA power recording equipment.

16. The method of claim 10 wherein sweeping the calibration signals through predetermined ranges begins with generating a predetermined maximum voltage that provides a maximum RF output power.

17. The method of claim 10 further including receiving a pseudo-envelope look-up table (LUT) that is derived from the PA power measurements.

18. The method of claim 10 wherein the transceiver further includes a calibrated detector for measuring the PA power.

19. The method of claim 18 wherein the sweeping the calibration signals through predetermined ranges is performed using successive approximation of envelope voltage to calibrate pre-established values of a pseudo-envelope LUT included with the transceiver.

20. The method of claim 19 further including an input voltage (VIN) LUT having pre-defined values that are autonomously searched by the calibration subsystem for each of the pre-established values of the pseudo-envelope LUT.

21. The method of claim 10 further including sweeping a first calibration signal through a first predetermined range linearly and sweeping a second calibration signal through a second predetermined range exponentially.

22. The method of claim 10 wherein sweeping the calibration signals through predetermined ranges begins with generating a predetermined maximum envelope voltage.