Method of selective power cycling of components in a memory device independently by turning off power to a memory array or memory controller
First Claim
1. A method comprising:
- reading, by a host, a status register in a controller of a non-volatile memory device to determine whether a power cycle request has been made by the non-volatile memory device;
decoding, by the host, contents of the status register; and
power cycling, by the host, at least one of the controller or a memory array of the non-volatile memory device based on the status register contents, wherein the power cycling includes turning off the power to a first power rail coupled to the controller.
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Abstract
In a non-volatile memory system, physically separate power rails are provided from a host system to a NVM device for independently power cycling a controller and memory array in the NVM device. The controller of the NVM device can send a power cycle request signal to the host system over a host channel, or updates a status register in the NVM device. The host system receives and decodes the power cycle request signal, or reads the status register, and performs the power cycle request, which can include power cycling the controller or the memory array in the NVM device, or both. The power cycle request can be based on a power state of the non-volatile memory system, which can be managed by the controller or the host system, or both.
56 Citations
11 Claims
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1. A method comprising:
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reading, by a host, a status register in a controller of a non-volatile memory device to determine whether a power cycle request has been made by the non-volatile memory device; decoding, by the host, contents of the status register; and power cycling, by the host, at least one of the controller or a memory array of the non-volatile memory device based on the status register contents, wherein the power cycling includes turning off the power to a first power rail coupled to the controller. - View Dependent Claims (2, 3, 4, 5)
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6. A non-volatile memory system, comprising:
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a host system; a non-volatile memory device coupled to the host system; a memory array included in the non-volatile memory device and coupled to a power source in the host system by a first power rail; and a controller within the non-volatile memory device and coupled to the power source by a second power rail; wherein the controller is configured to update contents of a status register in the controller, and the host system is configured to read the status register and perform a power cycle on the first power rail or the second power rail based on the contents of the status register, wherein performing the power cycling includes removing the power from the first power rail. - View Dependent Claims (7, 8, 9, 10, 11)
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Specification