Performing OPC on hardware or software platforms with GPU

• US 8,615,723 B2
• Filed: 08/28/2012
• Issued: 12/24/2013
• Est. Priority Date: 12/02/2005
• Status: Active Grant

• Current Assignee: D2S, Inc.
• Original Assignee: Gauda, Inc. (D2S, Inc.)
• Inventors: Torunoglu, Ilhami H., Karakas, Ahmet
• Primary Examiner(s): Dinh, Paul
• Application Number:
  US13/597,134
• Publication Number:
  US 20120324405A1
• Time in Patent Office: 483 Days
• Field of Search: 716 50- 56
• US Class Current: 716/53
• CPC Class Codes: G03F 1/36 Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
• CPC Class Codes: G06F 30/39 Circuit design at the physical level physical level design for reconfigurable circuits G06F30/347

Abstract

Optical proximity correction techniques performed on one or more graphics processors improve the masks used for the printing of microelectronic circuit designs. Execution of OPC techniques on hardware or software platforms utilizing graphics processing units. GPUs may share the computation load with the system CPUs to efficiently and effectively execute the OPC method steps.

Claims

1. A system comprising:

a computing system comprising a plurality of nodes, wherein each node comprises at least one of at least one central processing unit or at least one graphics processing unit;

an interface to couple the plurality of nodes together;

a user interface for interacting with the computer system;

a nontransitory computer readable medium comprising procedures to split layout information used in the manufacture semiconductor devices into two-dimensional subregions, where these subregions overlap with each other;

nontransitory computer readable medium comprising procedures to generate data from the two-dimensional subregions, the data comprising a size and placement of features to be formed on a photolithography exposure mask used to manufacture semiconductor devices; and

the nontransitory computer readable medium comprising procedures to calculate optical proximity corrections on the data, wherein at least a portion of the procedures to calculate optical proximity corrections are executed using the graphics processing unit in one of the nodes.

2. The system of claim 1 wherein the interface comprises a PCI Express bus.

3. The system of claim 1 wherein the data describing a size and placement of features to be formed on a photolithography exposure mask used to manufacture semiconductor devices is directly coupled to one of the plurality of nodes and a portion of the data is passed through the interface to at least one other node.

4. The system of claim 1 wherein the procedures to calculate optical proximity corrections is directly coupled to one of the plurality of nodes, and at least a portion of the optical proximity correction calculation procedures are executed using the graphics processing unit on a different node from which the optical proximity correction calculation procedures are directly coupled.

5. The system of claim 1 wherein the procedures to calculate optical proximity corrections is directly coupled to one of the plurality of nodes, and at least a portion of the optical proximity correction calculation procedures are executed using the graphics processing unit of the node to which the optical proximity correction calculation procedures are directly coupled.

6. The system of claim 1 comprising:

the nontransitory computer readable medium comprising procedures to transfer the given layout information split-up into two-dimensional subregions to two or more nodes; and

the nontransitory computer readable medium comprising procedures executing on the two or more nodes to operate on the given layout information split-up into two-dimensional subregions.

7. The system of claim 6 comprising:

the nontransitory computer readable medium comprising procedures to combine results from a first node and a second node on the given layout information split-up into two-dimensional subregions.

8. The system of claim 7 wherein the procedures to combine results comprises stitching together the results by removing the overlapping regions.

9. The system of claim 8 wherein the stitching is performed by a single node.

10. The system of claim 8 wherein the stitching is performed by multiple nodes.

11. The system of claim 1 wherein an output from the procedures to calculate optical proximity corrections on the data is corrected data on a size and placement of features to be formed on a photolithography exposure mask, and

the nontransitory computer readable medium comprises procedures for generating a photolithography exposure mask using the corrected data.

12. The system of claim 1 wherein the interface comprises an AGP bus.

13. The system of claim 1 wherein the interface comprises a front side bus.

14. The system of claim 1 wherein the interface comprises an Ethernet.

15. The system of claim 1 wherein the interface comprises the Internet.

16. The system of claim 1 wherein the layout information comprises multiple two-dimensional layers of a physical layout of an integrated circuit.

17. The system of claim 1 wherein procedures to calculate optical proximity corrections comprises instructions available on the graphics processing unit but not on the central processing unit.

18. The system of claim 1 wherein the procedures to calculate optical proximity corrections comprise transformation matrix calculations.

19. The system of claim 1 wherein the procedures to calculate optical proximity corrections performing a frequency domain calculation using a graphics processing unit.

20. The system of claim 1 wherein the procedures to calculate optical proximity corrections performing a spatial domain calculation using a graphics processing unit.