Edge termination structure employing recesses for edge termination elements

• US 8,618,582 B2
• Filed: 09/11/2011
• Issued: 12/31/2013
• Est. Priority Date: 09/11/2011
• Status: Active Grant

• Current Assignee: Wolfspeed, Inc.
• Original Assignee: CREE Incorporated (Wolfspeed, Inc.)
• Inventors: Henning, Jason Patrick, Zhang, Qingchun, Ryu, Sei-Hyung, Agarwal, Anant, Palmour, John Williams, Allen, Scott
• Primary Examiner(s): Smith, Zandra
• Assistant Examiner(s): PATTON, PAUL E
• Application Number:
  US13/229,750
• Publication Number:
  US 20130062619A1
• Time in Patent Office: 842 Days
• Field of Search: 257/483, 257/484, 257/471, 257/E33.051, 257/E29.013, 257/E29.338, 257/E21.368
• US Class Current: 257/267
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/05552 in top view
• CPC Class Codes: H01L 2224/05567 the external layer being at least partially embedded in the surface
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05639 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/05644 Gold [Au] as principal constituent
• CPC Class Codes: H01L 29/0619 with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
• CPC Class Codes: H01L 29/0661 specially adapted for altering the breakdown voltage by removing semiconductor material at, or in the neighbourhood of, a reverse biased junction, e.g. by bevelling, moat etching, depletion etching
• CPC Class Codes: H01L 29/8611 Planar PN junction diodes
• CPC Class Codes: H01L 29/872 Schottky diodes
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/12032 Schottky diode
• CPC Class Codes: H01L 2924/1301 Thyristor
• CPC Class Codes: H01L 2924/1305 Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/13055 Insulated gate bipolar transistor [IGBT]

Abstract

Elements of an edge termination structure, such as multiple concentric guard rings, are effectively doped regions in a drift layer. To increase the depth of these doped regions, individual recesses may be formed in a surface of the drift layer where the elements of the edge termination structure are to be formed. Once the recesses are formed in the drift layer, these areas about and at the bottom of the recesses are doped to form the respective edge termination elements.

Claims

1. A semiconductor device comprising:

a drift layer having a first surface associated with an active region and an edge termination region substantially laterally adjacent the active region, wherein the drift layer is predominantly doped with a doping material of a first conductivity type and the edge termination region comprises an edge termination recess extending into the drift layer from the first surface where a plurality of edge termination element recesses that extend into the drift layer are within the edge termination recess;

a plurality of first doped regions that extend into the drift layer about corresponding ones of the plurality of edge termination element recesses to form a plurality of edge termination elements wherein the plurality of first doped regions are doped with a doping material of a second conductivity type, which is opposite the first conductivity type; and

a Schottky layer over the active region of the first surface to form a Schottky junction.

2. The semiconductor device of claim 1 wherein the plurality of edge termination element recesses are formed in a bottom surface of the edge termination recess.

3. The semiconductor device of claim 2 wherein a recess well is formed in the drift layer below the bottom surface of the edge termination recess, and the recess well is doped with the doping material of the second conductivity type.

4. The semiconductor device of claim 2 wherein the edge termination recess is greater than 0.2 microns deep.

5. The semiconductor device of claim 2 wherein the edge termination recess is between about 0.2 and 0.5 microns deep.

6. The semiconductor device of claim 1 wherein each of the plurality of edge termination element recesses has at least one side and a bottom, and each of the plurality of first doped regions extends into the drift layer about the at least one side and the bottom of a corresponding one of the plurality of edge termination element recesses.

7. The semiconductor device of claim 1 wherein edge termination elements in the plurality of edge termination elements are separated from one another within the drift layer.

8. The semiconductor device of claim 1 wherein a depth of at least one of the plurality of edge termination element recesses is at least 0.1 microns.

9. The semiconductor device of claim 8 wherein a width of at least one of the plurality of edge termination element recesses is at least 0.5 microns.

10. The semiconductor device of claim 1 wherein a width of at least one of the plurality of edge termination element recesses is at least 0.5 microns.

11. The semiconductor device of claim 1 wherein the active region is provided on a mesa in the drift layer and further comprising a mesa guard ring that extends substantially about the Schottky layer such that the mesa guard ring resides between the Schottky layer and the plurality of edge termination elements.

12. The semiconductor device of claim 11 wherein the first surface of the drift layer about the active region comprises a mesa guard ring recess such that the mesa guard ring is a second doped region that extends into the drift layer about the mesa guard ring recess, and the second doped region is doped with the doping material of the second conductivity type.

13. The semiconductor device of claim 1 further comprising an array of junction barrier elements formed in the drift layer below the Schottky junction.

14. The semiconductor device of claim 13 wherein the drift layer comprises silicon carbide.

15. The semiconductor device of claim 14 wherein each junction barrier element of the array of junction barrier elements is substantially identical to others of the array of junction barrier elements.

16. The semiconductor device of claim 14 wherein at least a first junction barrier element of the array of junction barrier elements is substantially different in size or shape than at least a second junction barrier element of the array of junction barrier elements.

17. The semiconductor device of claim 14 wherein at least certain junction barrier elements in the array of junction barrier elements are elongated stripes.

18. The semiconductor device of claim 14 wherein at least certain junction barrier elements in the array of junction barrier elements are substantially round.

19. The semiconductor device of claim 14 wherein the first surface of the drift layer comprises a plurality of junction barrier element recesses in the active region such that at least certain junction barrier elements of the array of junction barrier elements are second doped regions that extend into the drift layer about corresponding ones of the plurality of junction barrier element recesses, and the second doped regions are doped with the doping material of the second conductivity type.

20. The semiconductor device of claim 1 wherein the Schottky junction has a barrier height of less than 0.9 electron volts.

21. The semiconductor device of claim 1 wherein the Schottky layer is formed from a low barrier height capable metal.

22. The semiconductor device of claim 21 wherein the low barrier height capable metal of the Schottky layer comprises tantalum.

23. The semiconductor device of claim 21 wherein the low barrier height capable metal of the Schottky layer comprises at least one of a group consisting of titanium, chromium, and aluminum.

24. The semiconductor device of claim 21 wherein the low barrier height capable metal of the Schottky layer consists essentially of tantalum.

25. The semiconductor device of claim 1 wherein the drift layer is formed over a thinned substrate that was thinned after the drift layer was formed, and a cathode contact is formed over a bottom surface of the thinned substrate.

26. The semiconductor device of claim 1 wherein the drift layer is predominantly doped with the doping material of the first conductivity type in a graded fashion wherein the drift layer has a lower doping concentration near the first surface and an intentionally higher doping concentration near a second surface of the drift layer, the second surface being substantially opposite the first surface.

27. The semiconductor device of claim 1 wherein the drift layer comprises silicon carbide.

28. The semiconductor device of claim 1 wherein the drift layer and the Schottky layer are part of a Schottky diode.

29. The semiconductor device of claim 28 wherein when forward biased, supports a DC current density of at least 440 amperes/cm.

30. The semiconductor device of claim 28 wherein when forward biased, supports a DC current density of at least 500 amperes/cm.

31. The semiconductor device of claim 28 wherein a ratio of DC forward biased current density to reverse biased anode-cathode capacitance is at least 0.275 ampere/pico-Farad (A/pF), wherein a reverse biased anode-cathode voltage is determined when the Schottky diode is reverse biased to a point where the active region is essentially fully depleted.

32. The semiconductor device of claim 28 wherein a ratio of DC forward biased current density to reverse biased anode-cathode capacitance is at least 0.3 ampere/pico-Farad (A/pF), wherein a reverse biased anode-cathode voltage is determined when the Schottky diode is reverse biased to a point where the active region is essentially fully depleted.

33. The semiconductor device of claim 28 wherein a ratio of DC forward biased current density to reverse biased anode-cathode capacitance is at least 0.35 ampere/pico-Farad (A/pF), wherein a reverse biased anode-cathode voltage is determined when the Schottky diode is reverse biased to a point where the active region is essentially fully depleted.

34. The semiconductor device of claim 1 wherein the plurality of edge termination elements is a plurality of guard rings.

35. The semiconductor device of claim 1 wherein the drift layer and the Schottky layer are part of a silicon carbide Schottky diode.