Junction gate field effect transistor structure having n-channel
First Claim
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1. A junction gate field effect transistor (JFET) comprising:
- a p-type substrate having a p-region therein;
an n-channel over the p-region;
a p-well abutting each of the n-channel and the p-region; and
n-doped enhancement regions within the n-channel, each n-doped enhancement region separated from the p-region,wherein the p-well abuts each of an n-well and a deep n-region, the deep n-region being disposed between the p-well and the p-type substrate,wherein the deep n-region abuts the n-well,wherein the n-channel is distinct from the n-well, andwherein the p-well is disposed between the n-well and the n-channel, and the p-well separates the n-well from the n-channel.
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Abstract
The disclosure relates generally to junction gate field effect transistor (JFET) structures and methods of forming the same. The JFET structure includes a p-type substrate having a p-region therein; an n-channel thereunder; and n-doped enhancement regions within the n-channel, each n-doped enhancement region separated from the p-region.
15 Citations
20 Claims
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1. A junction gate field effect transistor (JFET) comprising:
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a p-type substrate having a p-region therein; an n-channel over the p-region; a p-well abutting each of the n-channel and the p-region; and n-doped enhancement regions within the n-channel, each n-doped enhancement region separated from the p-region, wherein the p-well abuts each of an n-well and a deep n-region, the deep n-region being disposed between the p-well and the p-type substrate, wherein the deep n-region abuts the n-well, wherein the n-channel is distinct from the n-well, and wherein the p-well is disposed between the n-well and the n-channel, and the p-well separates the n-well from the n-channel. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A junction gate field effect transistor (JFET) comprising:
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a p-type substrate having an n-well therein; a p-well abutting the n-well and abutting a deep n-region of the n-well, wherein the deep n-region is between the p-well and the substrate, and abuts the n-well; an n-channel abutting the p-well and on a p-region of the p-well, wherein the p-region is between the n-channel and the deep n-region, wherein the n-channel is distinct from the n-well and the p-well is disposed between the n-well and the n-channel; a p-doped gate on the n-channel; n-doped enhancement regions within the n-channel, each n-doped enhancement region separated from the p-doped gate by a shallow trench isolation; an n-well contact on the n-well; a p-well contact on the p-well and in contact with the p-doped gate; and n-channel contacts on the n-doped enhancement regions, wherein the n-channel contacts are each separated from the p-doped gate and separated from the p-well contact by a shallow trench isolation. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19)
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20. A junction gate field effect transistor (JFET) comprising:
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a p-type substrate having a p-region therein; an n-channel over the p-region; a p-doped gate on the n-channel; and n-doped enhancement regions within the n-channel, each n-doped enhancement region separated from the p-region, wherein the n-doped enhancement regions are each separated from the p-doped gate by a shallow trench isolation; a p-well abutting the p-region and the n-channel; a deep n-region directly below and in contact with the p-region, the deep n-region abutting the n-well and the p-well; and an n-well abutting the p-well, the n-well and the n-channel being separated from one another by the p-well.
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Specification