Liquid crystal display device and electronic device

• US 8,619,104 B2
• Filed: 02/04/2011
• Issued: 12/31/2013
• Est. Priority Date: 02/12/2010
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Umezaki, Atsushi, Miyake, Hiroyuki
• Primary Examiner(s): Bolotin, Dmitriy
• Application Number:
  US13/021,215
• Publication Number:
  US 20110199404A1
• Time in Patent Office: 1,061 Days
• Field of Search: 345 87-100, 345204-215, 345690-699
• US Class Current: 345/691
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2300/0876 Supplementary capacities in pixels having special driving circuits and electrodes instead of being connected to common electrode or ground; Use of additional capacitively coupled compensation electrodes
• CPC Class Codes: G09G 2310/08 Details of timing specific for flat panels, other than clock recovery
• CPC Class Codes: G09G 2320/0247 Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 2340/0435 Change or adaptation of the frame rate of the video stream
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence

Abstract

It is an object to suppress deterioration of a displayed still image which is caused when a refresh rate is reduced. A liquid crystal display device includes a display portion controlled by a driver circuit and a timing controller for controlling the driver circuit. An image signal for displaying a still image is supplied to the timing controller. By the timing controller, a refresh rate in displaying an image corresponding to an image signal on the display portion reduced as a gray level number of the image signal is smaller.

Claims

1. A liquid crystal display device comprising:

a driver circuit configured to control a display portion; and

a timing controller configured to control the driver circuit,

wherein the timing controller is configured to be supplied with an image signal for displaying a still image,

wherein the timing controller is configured to supply a start pulse, a clock signal, and a potential to the driver circuit,

wherein the potential is selected from a first potential and a second potential which is smaller than the first potential,

wherein the timing controller is configured to stop the clock signal after the start pulse stops and to change the potential from the first potential to the second potential after the clock signal stops,

wherein the timing controller is configured to start supplying the clock signal after the potential is changed from the second potential to the first potential and to start supplying the start pulse after the supply of the clock signal is started, and

wherein the timing controller is configured to determine a refresh rate to display an image corresponding to a total number of gray levels in the image signal on the display portion.

2. The liquid crystal display device according to claim 1,

wherein the timing controller comprises:

an analyzing portion configured to judge the total number of gray levels of the image signal, and generate a signal corresponding to the total number of gray levels;

a lookup table portion configured to store a lookup table for determining the refresh rate in accordance with the signal; and

a panel controller controlled by the lookup table portion in accordance with the lookup table.

3. The liquid crystal display device according to claim 2,

wherein the analyzing portion comprises:

a counter circuit provided for counting a bit of the image signal and configured to judge a change of the bit; and

a determining portion configured to judge whether an output from the count circuit changes or not and to output a result of the judgment to the lookup table portion.

4. The liquid crystal display device according to claim 1,

wherein each pixel in the display portion comprises a transistor, and

wherein a semiconductor layer of the transistor includes an oxide semiconductor.

5. The liquid crystal display device according to claim 4, wherein the oxide semiconductor comprises at least one of indium, gallium, tin, and zinc.

6. An electronic device comprising the liquid crystal display device according to claim 1.

7. The liquid crystal display device according to claim 1, wherein the timing controller is configured to reduce a refresh rate to display an image corresponding to the image signal on the display portion as a total number of gray levels of the image signal is smaller.

8. A liquid crystal display device comprising:

a driver circuit configured to control a display portion;

a timing controller configured to control the driver circuit; and

an image process circuit configured to process an image signal, and to output a processing image signal to the timing controller,

wherein the timing controller is configured to supply a start pulse, a clock signal, and a potential,

wherein the potential is selected from a first potential and a second potential which is smaller than the first potential,

wherein the timing controller is configured to stop the clock signal after the start pulse stops and to change the potential from the first potential to the second potential after the clock signal stops,

wherein the timing controller is configured to start supplying the clock signal after the potential is changed from the second potential to the first potential and to start supplying the start pulse after the supply of the clock signal is started, and

wherein the timing controller is configured to determine a refresh rate to display an image corresponding to a total number of gray levels in the processing image signal on the display portion.

9. The liquid crystal display device according to claim 8,

wherein the timing controller comprises:

an analyzing portion configured to judge the total number of gray levels of the processing image signal, and generate a signal corresponding to the total number of gray levels;

a lookup table portion configured to store a lookup table for determining the refresh rate in accordance with the signal; and

a panel controller controlled by the lookup table portion in accordance with the lookup table.

10. The liquid crystal display device according to claim 9,

wherein the analyzing portion comprises:

a counter circuit provided for counting a bit of the processing image signal and configured to judge a change of the bit; and

a determining portion configured to judge whether an output from the count circuit changes or not and to output a result of the judgment to the lookup table portion.

11. The liquid crystal display device according to claim 8,

wherein each pixel in the display portion comprises a transistor, and

wherein a semiconductor layer of the transistor includes an oxide semiconductor.

12. The liquid crystal display device according to claim 11, wherein the oxide semiconductor comprises at least one of indium, gallium, tin, and zinc.

13. An electronic device comprising the liquid crystal display device according to claim 8.

14. The liquid crystal display device according to claim 8, wherein the timing controller is configured to reduce a refresh rate to display an image corresponding to the processing image signal on the display portion as a total number of gray levels of the processing image signal is smaller.

15. A liquid crystal display device comprising:

a driver circuit configured to control a display portion; and

a timing controller configured to control the driver circuit,

wherein the timing controller is configured to convert a first refresh rate into a second refresh rate in the display portion in a first state and to convert the second refresh rate into the first refresh rate in the display portion in a second state,

wherein the first refresh rate corresponds to a first image signal which has a first total number of gray levels, and the second refresh rate corresponds to a second image signal which has a second total number of gray levels,

wherein the timing controller is configured to supply a start pulse, a clock signal, and a potential to the driver circuit,

wherein the potential is selected from a first potential and a second potential which is smaller than the first potential,

wherein the timing controller is configured to stop the clock signal after the start pulse stops and to change the potential from the first potential to the second potential after the clock signal stops in the first state,

wherein the timing controller is configured to start supplying the clock signal after the potential is changed from the second potential to the first potential and to start supplying the start pulse after the supply of the clock signal is started in the second state, and

wherein the second total number is smaller than the first total number.

16. The liquid crystal display device according to claim 15,

wherein the timing controller comprises:

an analyzing portion configured to judge the second total number, and generate a signal corresponding to the second total number;

a lookup table portion configured to store a lookup table for determining a refresh rate in accordance with the signal; and

a panel controller controlled by the lookup table portion in accordance with the lookup table.

17. The liquid crystal display device according to claim 16,

wherein the analyzing portion comprises:

a counter circuit provided for counting a bit of the image signal and configured to judge a change of the bit; and

a determining portion configured to judge whether an output from the count circuit changes or not and to output a result of the judgment to the lookup table portion.

18. The liquid crystal display device according to claim 15,

wherein each pixel in the display portion comprises a transistor, and

wherein a semiconductor layer of the transistor includes an oxide semiconductor.

19. The liquid crystal display device according to claim 18, wherein the oxide semiconductor comprises at least one of indium, gallium, tin, and zinc.

20. An electronic device comprising the liquid crystal display device according to claim 15.

21. A liquid crystal display device comprising:

a driver circuit configured to control a display portion;

a timing controller configured to control the driver circuit; and

an image process circuit configured to process an image signal, and output a processing image signal to the timing controller,

wherein the timing controller is configured to convert a first refresh rate into a second refresh rate in the display portion in a first state or to convert the second refresh rate into the first refresh rate in the display portion in a second state,

wherein the first refresh rate corresponds to a first image signal which has a first total number of gray levels, and the second refresh rate corresponds to the processing image signal which has a second total number of gray levels,

wherein the timing controller is configured to supply a start pulse, a clock signal, and a potential to the driver circuit,

wherein the potential is selected from a first potential and a second potential which is smaller than the first potential,

wherein the timing controller is configured to stop the clock signal after the start pulse stops and to change the potential from the first potential to the second potential after the clock signal stops in the first state,

wherein the timing controller is configured to start supplying the clock signal after the potential is changed from the second potential to the first potential and to start supplying the start pulse after the supply of the clock signal is started in the second state, and

wherein the second total number is smaller than the first total number.

22. The liquid crystal display device according to claim 21,

wherein the timing controller comprises:

an analyzing portion configured to judge the second total number, and generate a signal corresponding to the second total number;

a lookup table portion configured to store a lookup table for determining a refresh rate in accordance with the signal; and

a panel controller controlled by the lookup table portion in accordance with the lookup table.

23. The liquid crystal display device according to claim 22,

wherein the analyzing portion comprises;

a counter circuit provided for counting a bit of the image signal and configured to judge a change of the bit; and

a determining portion configured to judge whether an output from the count circuit changes or not and to output a result of the judgment to the lookup table portion.

24. The liquid crystal display device according to claim 21,

wherein each pixel in the display portion comprises a transistor, and

wherein a semiconductor layer of the transistor includes an oxide semiconductor.

25. The liquid crystal display device according to claim 24, wherein the oxide semiconductor comprises at least one of indium, gallium, tin, and zinc.

26. An electronic device comprising the liquid crystal display device according to claim 21.