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Flexible memory operations in NAND flash devices

  • US 8,619,493 B2
  • Filed: 01/11/2012
  • Issued: 12/31/2013
  • Est. Priority Date: 02/04/2008
  • Status: Active Grant
First Claim
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1. A flash memory device formed on a single semiconductor chip, the flash memory device comprising:

  • a memory element configured to perform memory operations, the memory element including at least two memory banks each having local core circuitry, each of the at least two memory banks having a configurable page size for receiving and providing data having different page sizes during memory operations,each of the at least two memory banks including two memory planes, each having NAND memory cell strings connected to bitlines and wordlines connected to flash memory cells of each of the NAND memory cell strings; and

    core controller circuitry configured to receive control signals corresponding to the memory operations and for concurrently controlling the at least two memory banks in response to the received control signals.

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